[llvm] 67bd3c5 - [X86] Add register definitions for cfi directives
Alex Brachet via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 19 06:11:08 PST 2023
Author: Alex Brachet
Date: 2023-01-19T14:10:31Z
New Revision: 67bd3c58c0c7389e39c5a2f4d3b1a30459ccf5b7
URL: https://github.com/llvm/llvm-project/commit/67bd3c58c0c7389e39c5a2f4d3b1a30459ccf5b7
DIFF: https://github.com/llvm/llvm-project/commit/67bd3c58c0c7389e39c5a2f4d3b1a30459ccf5b7.diff
LOG: [X86] Add register definitions for cfi directives
Add {e,r}flags, {g,f}s.base registers so they can be referenced in cfi
directives,. They are not otherwise useable in any instructions,
but can be implicitly pushed to the stack like with pushf for
{e,r}flags.
Differential Revision: https://reviews.llvm.org/D141879
Added:
Modified:
llvm/lib/Target/X86/X86RegisterInfo.td
llvm/test/CodeGen/X86/ipra-reg-usage.ll
llvm/test/MC/ELF/cfi-offset.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.td b/llvm/lib/Target/X86/X86RegisterInfo.td
index d1445384abdf6..aa4b83a6aaee4 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.td
+++ b/llvm/lib/Target/X86/X86RegisterInfo.td
@@ -311,7 +311,9 @@ def MXCSR : X86Reg<"mxcsr", 0>;
// reading and updating those flags independently of all the others. We don't
// want to create false dependencies between these instructions and so we use
// a separate register to model them.
-def EFLAGS : X86Reg<"flags", 0>;
+def EFLAGS : X86Reg<"flags", 0>, DwarfRegNum<[49, 9, 9]>;
+def _EFLAGS : X86Reg<"eflags", 0>, DwarfRegAlias<EFLAGS>;
+def RFLAGS : X86Reg<"rflags", 0>, DwarfRegNum<[49, -2, -2]>;
// The direction flag.
def DF : X86Reg<"dirflag", 0>;
@@ -325,6 +327,9 @@ def ES : X86Reg<"es", 0>;
def FS : X86Reg<"fs", 4>;
def GS : X86Reg<"gs", 5>;
+def FS_BASE : X86Reg<"fs.base", 0>, DwarfRegNum<[58, -2, -2]>;
+def GS_BASE : X86Reg<"gs.base", 0>, DwarfRegNum<[59, -2, -2]>;
+
// Debug registers
def DR0 : X86Reg<"dr0", 0>;
def DR1 : X86Reg<"dr1", 1>;
diff --git a/llvm/test/CodeGen/X86/ipra-reg-usage.ll b/llvm/test/CodeGen/X86/ipra-reg-usage.ll
index 3eb7ef02c0599..36c4d6eff0018 100644
--- a/llvm/test/CodeGen/X86/ipra-reg-usage.ll
+++ b/llvm/test/CodeGen/X86/ipra-reg-usage.ll
@@ -3,7 +3,7 @@
target triple = "x86_64-unknown-unknown"
declare void @bar1()
define preserve_allcc void @foo()#0 {
-; CHECK: foo Clobbered Registers: $cs $df $ds $eflags $eip $eiz $es $esp $fpcw $fpsw $fs $gs $hip $hsp $ip $mxcsr $rip $riz $rsp $sp $sph $spl $ss $ssp $tmmcfg $cr0 $cr1 $cr2 $cr3 $cr4 $cr5 $cr6 $cr7 $cr8 $cr9 $cr10 $cr11 $cr12 $cr13 $cr14 $cr15 $dr0 $dr1 $dr2 $dr3 $dr4 $dr5 $dr6 $dr7 $dr8 $dr9 $dr10 $dr11 $dr12 $dr13 $dr14 $dr15 $fp0 $fp1 $fp2 $fp3 $fp4 $fp5 $fp6 $fp7 $k0 $k1 $k2 $k3 $k4 $k5 $k6 $k7 $mm0 $mm1 $mm2 $mm3 $mm4 $mm5 $mm6 $mm7 $r11 $st0 $st1 $st2 $st3 $st4 $st5 $st6 $st7 $tmm0 $tmm1 $tmm2 $tmm3 $tmm4 $tmm5 $tmm6 $tmm7 $xmm16 $xmm17 $xmm18 $xmm19 $xmm20 $xmm21 $xmm22 $xmm23 $xmm24 $xmm25 $xmm26 $xmm27 $xmm28 $xmm29 $xmm30 $xmm31 $ymm0 $ymm1 $ymm2 $ymm3 $ymm4 $ymm5 $ymm6 $ymm7 $ymm8 $ymm9 $ymm10 $ymm11 $ymm12 $ymm13 $ymm14 $ymm15 $ymm16 $ymm17 $ymm18 $ymm19 $ymm20 $ymm21 $ymm22 $ymm23 $ymm24 $ymm25 $ymm26 $ymm27 $ymm28 $ymm29 $ymm30 $ymm31 $zmm0 $zmm1 $zmm2 $zmm3 $zmm4 $zmm5 $zmm6 $zmm7 $zmm8 $zmm9 $zmm10 $zmm11 $zmm12 $zmm13 $zmm14 $zmm15 $zmm16 $zmm17 $zmm18 $zmm19 $zmm20 $zmm21 $zmm22 $zmm23 $zmm24 $zmm25 $zmm26 $zmm27 $zmm28 $zmm29 $zmm30 $zmm31 $r11b $r11bh $r11d $r11w $r11wh $k0_k1 $k2_k3 $k4_k5 $k6_k7
+; CHECK: foo Clobbered Registers: $cs $df $ds $eflags $eip $eiz $es $esp $fpcw $fpsw $fs $fs_base $gs $gs_base $hip $hsp $ip $mxcsr $rflags $rip $riz $rsp $sp $sph $spl $ss $ssp $tmmcfg $_eflags $cr0 $cr1 $cr2 $cr3 $cr4 $cr5 $cr6 $cr7 $cr8 $cr9 $cr10 $cr11 $cr12 $cr13 $cr14 $cr15 $dr0 $dr1 $dr2 $dr3 $dr4 $dr5 $dr6 $dr7 $dr8 $dr9 $dr10 $dr11 $dr12 $dr13 $dr14 $dr15 $fp0 $fp1 $fp2 $fp3 $fp4 $fp5 $fp6 $fp7 $k0 $k1 $k2 $k3 $k4 $k5 $k6 $k7 $mm0 $mm1 $mm2 $mm3 $mm4 $mm5 $mm6 $mm7 $r11 $st0 $st1 $st2 $st3 $st4 $st5 $st6 $st7 $tmm0 $tmm1 $tmm2 $tmm3 $tmm4 $tmm5 $tmm6 $tmm7 $xmm16 $xmm17 $xmm18 $xmm19 $xmm20 $xmm21 $xmm22 $xmm23 $xmm24 $xmm25 $xmm26 $xmm27 $xmm28 $xmm29 $xmm30 $xmm31 $ymm0 $ymm1 $ymm2 $ymm3 $ymm4 $ymm5 $ymm6 $ymm7 $ymm8 $ymm9 $ymm10 $ymm11 $ymm12 $ymm13 $ymm14 $ymm15 $ymm16 $ymm17 $ymm18 $ymm19 $ymm20 $ymm21 $ymm22 $ymm23 $ymm24 $ymm25 $ymm26 $ymm27 $ymm28 $ymm29 $ymm30 $ymm31 $zmm0 $zmm1 $zmm2 $zmm3 $zmm4 $zmm5 $zmm6 $zmm7 $zmm8 $zmm9 $zmm10 $zmm11 $zmm12 $zmm13 $zmm14 $zmm15 $zmm16 $zmm17 $zmm18 $zmm19 $zmm20 $zmm21 $zmm22 $zmm23 $zmm24 $zmm25 $zmm26 $zmm27 $zmm28 $zmm29 $zmm30 $zmm31 $r11b $r11bh $r11d $r11w $r11wh $k0_k1 $k2_k3 $k4_k5 $k6_k7
call void @bar1()
call void @bar2()
ret void
diff --git a/llvm/test/MC/ELF/cfi-offset.s b/llvm/test/MC/ELF/cfi-offset.s
index f538d50c24d7e..b4d37d544cdb6 100644
--- a/llvm/test/MC/ELF/cfi-offset.s
+++ b/llvm/test/MC/ELF/cfi-offset.s
@@ -1,11 +1,16 @@
-// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -S --sr --sd - | FileCheck %s
+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t
+// RUN: llvm-readobj -S --sr --sd %t | FileCheck %s
+// RUN: llvm-objdump --dwarf=frames %t | FileCheck %s --check-prefix=FRAMES
f:
- .cfi_startproc
+ .cfi_startproc
nop
- .cfi_offset %rbp, -16
+ .cfi_offset %rbp, -24
+ .cfi_offset %rflags, -16
+ .cfi_offset %gs.base, -8
+ .cfi_offset %fs.base, 0
nop
- .cfi_endproc
+ .cfi_endproc
// CHECK: Section {
// CHECK: Name: .eh_frame
@@ -15,7 +20,7 @@ f:
// CHECK-NEXT: ]
// CHECK-NEXT: Address: 0x0
// CHECK-NEXT: Offset: 0x48
-// CHECK-NEXT: Size: 48
+// CHECK-NEXT: Size: 56
// CHECK-NEXT: Link: 0
// CHECK-NEXT: Info: 0
// CHECK-NEXT: AddressAlignment: 8
@@ -24,8 +29,9 @@ f:
// CHECK-NEXT: ]
// CHECK-NEXT: SectionData (
// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
-// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000
-// CHECK-NEXT: 0020: 00000000 02000000 00418602 00000000
+// CHECK-NEXT: 0010: 1B0C0708 90010000 1C000000 1C000000
+// CHECK-NEXT: 0020: 00000000 02000000 00418603 B102BB01
+// CHECK-NEXT: 0030: BA000000 00000000
// CHECK-NEXT: )
// CHECK-NEXT: }
@@ -46,3 +52,8 @@ f:
// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
// CHECK-NEXT: ]
// CHECK: }
+
+// FRAMES: DW_CFA_offset: reg6 -24
+// FRAMES-NEXT: DW_CFA_offset: reg49 -16
+// FRAMES-NEXT: DW_CFA_offset: reg59 -8
+// FRAMES-NEXT: DW_CFA_offset: reg58 0
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