[PATCH] D139732: [AMDGPU] Add pass to rewrite partially used virtual superregisters after RenameIndependentSubregs pass with registers of minimal size.
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 17 14:00:37 PST 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp:206
+ NewSubReg = 0;
+ LLVM_DEBUG(dbgs() << "whole reg");
+ } else {
----------------
Seems like a missing newline?
================
Comment at: llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp:302-305
+ if (LIS) {
+ LIS->removeInterval(Reg);
+ LIS->createAndComputeVirtRegInterval(NewReg);
+ }
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arsenm wrote:
> vpykhtin wrote:
> > arsenm wrote:
> > > Can you do better than delete and recreate the liveness? Can we do this before liveness is computed?
> > Liveness is required by the previous pass but this pass doesn't use it so I decided not to require it.
> >
> > Liveness subranges aren't touched by this pass but some of them become main range instead of subrange. Subreg indexes and lanemasks need to be updated.
> Do you only need to do splitSeparateComponents for each changed register?
Ping on this, can you just do splitSeparateComponents? I don't see why you have to mutate the existing interval
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139732/new/
https://reviews.llvm.org/D139732
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