[PATCH] D139685: [DAGCombine]Expand usage of CreateBuildVecShuffle to make full use of vector ops

[Phoebe Wang via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG88eae6ef9fb5: [DAGCombine]Expand usage of CreateBuildVecShuffle to make full use of vector ops (authored by XinWang10, committed by pengfei).

Changed prior to commit:
  https://reviews.llvm.org/D139685?vs=481962&id=491222#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139685/new/

https://reviews.llvm.org/D139685

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/X86/avg.ll
  llvm/test/CodeGen/X86/pr29112.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-8.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
  llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll

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