[PATCH] D141606: [AArch64] Remove AES, SHA2, SHA3 and SM4 features from armv8.6-a+

Mon Jan 16 02:07:31 PST 2023

tnfchris added a comment.

In D141606#4051559 <https://reviews.llvm.org/D141606#4051559>, @philipp.tomsich wrote:

> Ampere1 supports FEAT_SHA1, FEAT_SHA2, FEAT_SHA3, FEAT_SHA512.
> Thanks for spotting this, I'll have to go investigate on the GCC side how that happened (as we make sure that -mcpu=native and -mcpu=ampere1 specify the same .arch).

The guards around the intrinsics currently check for `+crypto` (as in the option explicitly), this is why most likely the intrinsics isn't enabled.  This patch https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609981.html should fix it.

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https://reviews.llvm.org/D141606