[PATCH] D142031: [AArch64][SME2] Add intrinsics to move multi-vectors to/from ZA.

[Kerry McLaughlin via Phabricator via llvm-commits]

kmclaughlin added inline comments.


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Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:2836
+
+  def int_aarch64_sme_read_hor_vg2   : SME2_Matrix_ArrayVector_Read_VG2_Intrinsic;
+  def int_aarch64_sme_read_hor_vg4   : SME2_Matrix_ArrayVector_Read_VG4_Intrinsic;
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david-arm wrote:
> I wonder - given these are moving from a tile to a vector is it perhaps better named as something like
> 
> SME2_Matrix_TileVector_Read_VG2_Intrinsic
> SME2_Matrix_TileVector_Read_VG4_Intrinsic
> SME2_Matrix_TileVector_Write_VG2_Intrinsic
> SME2_Matrix_TileVector_Write_VG4_Intrinsic
> 
> and the others are actually reading from the array so perhaps these can be
> 
> SME2_ZA_ArrayVector_Read_VG2_Intrinsic
> SME2_ZA_ArrayVector_Read_VG4_Intrinsic
> SME2_ZA_ArrayVector_Write_VG2_Intrinsic
> SME2_ZA_ArrayVector_Write_VG4_Intrinsic
> 
> what do you think?
I've changed these classes to use the names suggested above as I think they are more accurate.


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Comment at: llvm/lib/Target/AArch64/SMEInstrFormats.td:795
                                        ComplexPattern tileslice> {
-  def : Pat<(op imm_ty:$tile, MatrixIndexGPR32Op12_15:$idx,
                 (ppr_vt PPR3bAny:$pg), (zpr_vt ZPRAny:$zn)),
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david-arm wrote:
> This wasn't mentioned in the commit message, but it looks like you're simplifying the patterns here because you can always use tileslice to get you base + offset, even if offset = 0? It's a nice clean-up!
Yes, this can be removed because offsets of 0 are handled by tileslice. I've added a note to the commit message about this change too :)


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142031/new/

https://reviews.llvm.org/D142031