[PATCH] D141706: [DAG][ARM][AArch64] Transform max(a, b) - min(a,b) -> abd(a,b)
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 18 03:44:35 PST 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG21df504399c2: [DAG][ARM][AArch64] Transform max(a,b) - min(a,b) -> abd(a,b) (authored by dmgreen).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D141706/new/
https://reviews.llvm.org/D141706
Files:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/AArch64/neon-abd.ll
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