[PATCH] D142217: [MC] Store target Insts table in reverse order. NFC.

[Jay Foad via Phabricator via llvm-commits]

foad added a subscriber: simon_tatham.
foad added inline comments.


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Comment at: llvm/include/llvm/MC/MCInstrInfo.h:65
     assert(Opcode < NumOpcodes && "Invalid opcode!");
-    return Desc[Opcode];
+    return Desc[NumOpcodes - 1 - Opcode];
   }
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arsenm wrote:
> Can the -1 be avoided?
Yes, MCInstrInfo could store `Desc + NumOpcodes - 1` instead of just `Desc`.


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Comment at: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:2506-2507
       unsigned NextOpIndex = Inst.getNumOperands();
-      const MCInstrDesc &MCID = ARMInsts[Inst.getOpcode()];
+      const MCInstrDesc &MCID =
+          ARMInsts[ARM::INSTRUCTION_LIST_END - 1 - Inst.getOpcode()];
       int TiedOp = MCID.getOperandConstraint(NextOpIndex, MCOI::TIED_TO);
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arsenm wrote:
> Why can't this one use the usual MCInstrInfo::get?
This is a method of ARMOperand, and it seems these addXXXOperands methods do not have access to the ARMAsmParser. I wanted to raise this with @simon_tatham who added this code in D62669. I wonder if this functionality could be reimplemented in an AsmMatchConverter instead. But I don't know if that is possible because I don't understand what this code is doing.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142217/new/

https://reviews.llvm.org/D142217