[PATCH] D142281: [AVR] Optimize 16-bit comparison with a constant
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 21 06:14:52 PST 2023
benshi001 added inline comments.
================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:659
+ if (Imm != 0)
+ llvm_unreachable("unexpected i16 comparison node");
+ // Generate a CPI/CPC pair.
----------------
Only a zero constant with be put at left by previous DAG transform, all other non-zero constant are dropped as RHS. So we have to handle it specially.
================
Comment at: llvm/test/CodeGen/AVR/cmp.ll:212
+; CHECK-NEXT: cpc r1, r25
+; CHECK-NEXT: brlt
+ %2 = icmp sgt i16 %0, 0
----------------
`x > 0` is compiled to `0 < x`, and the low 0 value byte and the high 0 value byte are represented by the zero register.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D142281/new/
https://reviews.llvm.org/D142281
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