[PATCH] D141962: [RISCV] Use vfirst insead of vcpop for i1 reduce.and/or.

[Michael Maitland via Phabricator via llvm-commits]

michaelmaitland added a comment.

In D141962#4061265 <https://reviews.llvm.org/D141962#4061265>, @pcwang-thead wrote:

> Is this `early out` really a feasible optimization for a microarchitecture?
> All I can think about it is: for mask instruction `vfirst.m`, supposed that there are `n = VLen / DataPath` microinstructions issued (ideally, they are executed parallelly), then if the first `k` microinstructions find the 1, we may write the result of `vfirst.m` back before we get results of the last `n-k` microinstructions. But I don't see too much gains compared to the extra complexity.

The question of gains has to do with how many rounds could be saved using this early out approach. It could be as much as VLen - 1 if DataPath = 1, it could be none if DataPath = VLen, or it could be somewhere in between.

It looks like using vfirst in the test cases above to implement the reduction lead to the same or one additional number of instructions. I wonder if the early out using vfirst makes up for the (possibly) additional instruction.


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