[PATCH] D141601: [AArch64][SME2] MOVA tile-to-vector and vector-to-tile should not accept VG suffix

[Matt Devereau via Phabricator via llvm-commits]

MattDevereau accepted this revision.
MattDevereau added inline comments.
This revision is now accepted and ready to land.


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Comment at: llvm/lib/Target/AArch64/SMEInstrFormats.td:3243
 
 class sme2_mova_tile_to_vec_vg2_multi_base<bits<2> sz, bit v, bits<3> op,
                                            RegisterOperand vector_ty,
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sdesmalen wrote:
> MattDevereau wrote:
> > Given that `vgx2` has been removed from this class is it not misleading to still have `vg2` in the class and multiclass name? Same goes for the `vgx4` variants.
> That's probably best done in a separate NFC patch, because it makes this change quite big. It would also mean changing the naming scheme for lots of other instructions (e.g. `defm ZIP_VG2_2ZZZ : sme2_zip_vector_vg2<"zip", 0b0>;`) which also uses `vg2` to mean "two vectors".
Fair enough, I can see these classes and multiclasses are used in quite a lot of places which wouldn't make sense to touch for a small patch like this.


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  https://reviews.llvm.org/D141601/new/

https://reviews.llvm.org/D141601