[PATCH] D141829: [AArch64] fold subs ugt/ult to ands when the second operand is a mask
chenglin.bi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 17 02:23:03 PST 2023
bcl5980 added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19817
+// (X & C) >u Mask --> (X & (C & (~Mask)) != 0
+// (X & C) <u Mask --> (X & (C & (~Mask)) == 0
+static SDValue performSubsToAndsCombine(SDNode *N, SDNode *SubsNode,
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chapuni wrote:
> I think the latter is wrong.
> eg. X=11 C=7 M=3
Thanks for the case.
I will send a quick fix for that.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D141829/new/
https://reviews.llvm.org/D141829
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