[PATCH] D141653: [X86] Improve instruction ordering of constant `srl/shl` with `and` to get better and-masks

Noah Goldstein via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 19 09:52:16 PST 2023


goldstein.w.n marked 6 inline comments as done.
goldstein.w.n added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:56681
 
+bool X86TargetLowering::isDesirableToCommuteWithShift(
+    const SDNode *N, CombineLevel Level) const {
----------------
pengfei wrote:
> Add a comment to explain this is for `combineLogicalShiftWithAnd`.
> Why `combineAndWithLogicalShift` not need this?
> Add a comment to explain this is for `combineLogicalShiftWithAnd`.
> Why `combineAndWithLogicalShift` not need this?

this is only called for shift ops (i.e `VisitSHL` and `visitShiftByConstant`).


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141653/new/

https://reviews.llvm.org/D141653



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