[PATCH] D141485: [X86] Add schedule module for SapphireRapids

Pei, Gen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 17 00:38:27 PST 2023


gpei added inline comments.


================
Comment at: llvm/test/CodeGen/X86/pmullq-false-deps.ll:9
+; ENABLE-NEXT:    vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; ENABLE-NEXT:    vpmullq %xmm1, %xmm0, %xmm2
+; ENABLE-NEXT:    vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
----------------
HaohaiWen wrote:
> RKSimon wrote:
> > please can you check if this is OK - I can't recall the exact nature of the false-deps issue but shouldn't xmm2 be cleared?
> Hi @gpei, could you please help to check this? Thanks.
The reason is there is no any use of xmm2 after the update of scheduling. Could we disable instruction scheduling for this test?


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  https://reviews.llvm.org/D141485/new/

https://reviews.llvm.org/D141485



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