[PATCH] D141791: [Thumb2][MVE] Recognise shuffle truncation patterns suitable for ARMISD::MVETRUNC

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/test/CodeGen/Thumb2/mve-vld4.ll:288
   %s3 = shufflevector <16 x i16> %l1, <16 x i16> undef, <4 x i32> <i32 2, i32 6, i32 10, i32 14>
   %s4 = shufflevector <16 x i16> %l1, <16 x i16> undef, <4 x i32> <i32 3, i32 7, i32 11, i32 15>
   %a1 = add <4 x i16> %s1, %s2
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I think if we supported trunc from wider elements (in this case vXi64 to vXi16) we'd be able to catch all of these - but the patch currently only handles truncation from double-width element types.


Repository:
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  https://reviews.llvm.org/D141791/new/

https://reviews.llvm.org/D141791