The Week Of Monday 13 February 2023 Archives by author
Starting: Mon Feb 13 00:01:47 PST 2023
Ending: Sun Feb 19 23:57:30 PST 2023
Messages: 2419
- [PATCH] D144162: [AMDGPU] Replace LegacyDA with Uniformity Analysis in AnnotateUniformValues
Ruiling, Song via Phabricator via llvm-commits
- [PATCH] D144162: [AMDGPU] Replace LegacyDA with Uniformity Analysis in AnnotateUniformValues
Ruiling, Song via Phabricator via llvm-commits
- [PATCH] D144254: [llvm][Uniformity] a phi with an undef argument is not always divergent
Ruiling, Song via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144244: [X86]rearange X86InstrInfo.td
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144244: [X86]rearange X86InstrInfo.td
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144244: [X86]rearange X86InstrInfo.td
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D143781: [Clang][LLVM] Enable __arithmetic_fence and fprotect-parens on AArch64
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D143632: [clang] Handle __declspec() attributes in using
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D143804: [bazel] create a clang-tidy binary target
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D143804: [bazel] create a clang-tidy binary target
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D143973: [bazel] build fix
Aart Bik via Phabricator via llvm-commits
- [PATCH] D143973: [bazel] build fix
Aart Bik via Phabricator via llvm-commits
- [PATCH] D143973: [bazel] build fix
Aart Bik via Phabricator via llvm-commits
- [PATCH] D144124: [mlir] bazel fix
Aart Bik via Phabricator via llvm-commits
- [PATCH] D144124: [mlir] bazel fix
Aart Bik via Phabricator via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Aart Bik via Phabricator via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Aart Bik via Phabricator via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Aart Bik via Phabricator via llvm-commits
- [PATCH] D143916: [runtimes] Set LLVM_ENABLE_PER_TARGET_RUNTIME_DIR_default to ON for OS390
Abhina Sree via Phabricator via llvm-commits
- [PATCH] D143921: [debug-info][codegen] Prevent creation of self-referential SP node
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D143921: [debug-info][codegen] Prevent creation of self-referential SP node
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D143921: [debug-info][codegen] Prevent creation of self-referential SP node
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D143229: [FunctionImporter] Add flag to disable upgrading debug info
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D142283: [Support] Make llvm-symbolizer runs for stack traces work on Apple platforms
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D143229: [FunctionImporter] Add flag to disable upgrading debug info
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D142283: [Support] Make llvm-symbolizer runs for stack traces work on Apple platforms
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D142283: [Support] Make llvm-symbolizer runs for stack traces work on Apple platforms
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D143841: [Propeller] Make decoding BBAddrMaps trace through relocations
Aiden Grossman via Phabricator via llvm-commits
- [llvm] 849c440 - [Flang][OpenMP] Added parser support for device_type clause
Akash Banerjee via llvm-commits
- [PATCH] D143671: [Flang][OpenMP] Added parser support for device_type clause
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D142914: [MLIR][OpenMP] Added OMPIRBuilder support for Target Data directives.
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D143671: [Flang][OpenMP] Added parser support for device_type clause
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D136537: [llvm-ocaml] Assume pointers are at least 2-bit aligned
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136537: [llvm-ocaml] Assume pointers are at least 2-bit aligned
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D143409: [SCEV][IndVarSimplify] Add nsw/nuw falgs to binary ops before visiting IVUsers
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D143409: [SCEV][IndVarSimplify] Add nsw/nuw falgs to binary ops before visiting IVUsers
Aleksandr Popov via Phabricator via llvm-commits
- [lld] 8b50048 - [lld][RISCV][test] Expand testing in riscv-attributes.s
Alex Bradbury via llvm-commits
- [lld] 179a24c - [lld][test][RISCV] Don't use incorrectly normalised arch string in riscv-attributes-place.s
Alex Bradbury via llvm-commits
- [llvm] d41a73a - [RISCV][MC] Mark Zawrs extension as non-experimental
Alex Bradbury via llvm-commits
- [PATCH] D143468: [CMake] Remove custom ccache CMake logic
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D143248: Emit CFI directives in epilogue and enable CFIFixup pass for RISC-V.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D143924: [RISCV][docs] Describe status of zicsr and zifencei
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D143982: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D144038: [RISCV] Add CLB/CLH/SLB/SLH formats for Zcb instructions.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D143708: [RISCV] Add emulated TLS supported
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D143982: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D143708: [RISCV] Add emulated TLS supported
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D144215: [WIP][RISCV] Accept zicntr and zihpm command line options
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D144353: [lld][RISCV] Avoid error when encountering unrecognised ISA extensions/versions in RISC-V attributes
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D143507: [RISCV][MC] Mark Zawrs extension as non-experimental
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Alex Zinenko via Phabricator via llvm-commits
- [PATCH] D135462: [SelectionDAG] Do not second-guess alignment for alloca
Alexander Kornienko via Phabricator via llvm-commits
- [PATCH] D135462: [SelectionDAG] Do not second-guess alignment for alloca
Alexander Kornienko via Phabricator via llvm-commits
- [PATCH] D135462: [SelectionDAG] Do not second-guess alignment for alloca
Alexander Kornienko via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D144174: [Support][RISCV] Disable use of backtrace() for RISC-V backtraces
Alexander Richardson via Phabricator via llvm-commits
- [llvm] 8f5d815 - [Clang][LLVM] Enable __arithmetic_fence and fprotect-parens on AArch64
Alexander Shaposhnikov via llvm-commits
- [PATCH] D143781: [Clang][LLVM] Enable __arithmetic_fence and fprotect-parens on AArch64
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D143781: [Clang][LLVM] Enable __arithmetic_fence and fprotect-parens on AArch64
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Alexandre Ganea via Phabricator via llvm-commits
- [llvm] e03d254 - [SLP]Do not reduce repeated values, use scalar red ops instead.
Alexey Bataev via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D144128: [SLP] Check with target before vectorizing GEP Indices
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D144128: [SLP] Check with target before vectorizing GEP Indices
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D144128: [SLP] Check with target before vectorizing GEP Indices
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D141940: [SLP]Add shuffling of extractelements to avoid extra costs/data movement.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D141940: [SLP]Add shuffling of extractelements to avoid extra costs/data movement.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D141940: [SLP]Add shuffling of extractelements to avoid extra costs/data movement.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D144292: [SLP] Fix infinite loop in isUndefVector.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D144292: [SLP] Fix infinite loop in isUndefVector.
Alexey Bataev via Phabricator via llvm-commits
- [llvm] 4c273cd - [DWARFLinker] Refactor cloneAddressAttribute().
Alexey Lapshin via llvm-commits
- [PATCH] D143269: [DWARFLinker] Refactor cloneAddressAttribute().
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D143269: [DWARFLinker] Refactor cloneAddressAttribute().
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D143903: [DWARFLinker][DWARFv5] Add support for .debug_rnglists.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D140788: [DWARFLinkerParallel] add AddressesMap interface.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D140791: [DWARFLinkerParallel] Add simple list with thread safe insertions.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D143793: Add the ability to segment GSYM files.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D139452: [LLVM] Use dyn_cast instead of cast for objects that require it
Alf via Phabricator via llvm-commits
- [PATCH] D139452: [LLVM] Use dyn_cast instead of cast for objects that require it
Alf via Phabricator via llvm-commits
- [PATCH] D139452: [LLVM] Use dyn_cast instead of cast for objects that require it
Alf via Phabricator via llvm-commits
- [PATCH] D139452: [LLVM][NFC] Remove unneeded llvm_unreachable
Alf via Phabricator via llvm-commits
- [PATCH] D139452: [Object][NFC] Remove unneeded llvm_unreachable
Alf via Phabricator via llvm-commits
- [PATCH] D144232: [PowerPC] Correctly use ELFv2 ABI on FreeBSD/powerpc64
Alfredo Dal'Ava Júnior via Phabricator via llvm-commits
- [PATCH] D143641: [MemorySSA] Iteratively check if gep's pointer operand is a guaranteed loop invariant
Alina Sbirlea via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143705: [LoopBoundSplit] Delete redundant loop guard
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D144248: [InstCombine] canonicalize urem as cmp+select (part 2)
Allen zhong via Phabricator via llvm-commits
- [PATCH] D144248: [InstCombine] canonicalize urem as cmp+select (part 2)
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D144324: [AArch64][SelectionDAG] Perfer CMN for (0 - Y) == Y
Allen zhong via Phabricator via llvm-commits
- [PATCH] D144324: [AArch64][SelectionDAG] Perfer CMN for (0 - Y) == Y
Allen zhong via Phabricator via llvm-commits
- [llvm] e117fd2 - [Symbolize][MinGW] Support demangling i386 call-conv-decorated C++ names
Alvin Wong via llvm-commits
- [PATCH] D144049: [Symbolize][MinGW] Support demangling i386 call-conv-decorated C++ names
Alvin Wong via Phabricator via llvm-commits
- [PATCH] D144049: [Symbolize][MinGW] Support demangling i386 call-conv-decorated C++ names
Alvin Wong via Phabricator via llvm-commits
- [PATCH] D144049: [Symbolize][MinGW] Support demangling i386 call-conv-decorated C++ names
Alvin Wong via Phabricator via llvm-commits
- [PATCH] D144049: [Symbolize][MinGW] Support demangling i386 call-conv-decorated C++ names
Alvin Wong via Phabricator via llvm-commits
- [PATCH] D144049: [Symbolize][MinGW] Support demangling i386 call-conv-decorated C++ names
Alvin Wong via Phabricator via llvm-commits
- [llvm] b309bc0 - [GlobalISel] Combine out-of-range shifts to undef.
Amara Emerson via llvm-commits
- [llvm] 556657c - [NFC][GlobalISel] Regenerate test checks for extending-loads test.
Amara Emerson via llvm-commits
- [llvm] ddf167c - [GlobalISel] Fix G_ZEXTLOAD being converted to G_SEXTLOAD incorrectly.
Amara Emerson via llvm-commits
- [llvm] 66d64aa - [GlobalISel] Fix a store-merging bug due to use of >= instead of >.
Amara Emerson via llvm-commits
- [PATCH] D144014: [LSR] Improve filtered uses in NarrowSearchSpaceByPickingWinnerRegs
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D144303: [GlobalISel] Combine out-of-range shifts to undef
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D144303: [GlobalISel] Combine out-of-range shifts to undef
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D144303: [GlobalISel] Combine out-of-range shifts to undef
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D144336: [GlobalISel] Fix DIVREM combine from inserting a divrem before its operands' defs.
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D127115: [RFC][DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D127115: [RFC][DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D139092: [RFC][LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Amilendra Kodithuwakku via Phabricator via llvm-commits
- [llvm] b673135 - [Release] Produce bolt tarball
Amir Ayupov via llvm-commits
- [PATCH] D143809: [Release] Produce bolt tarball
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D143809: [Release] Produce bolt tarball
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D130071: [BOLT] Adapted policy checks for stripped binaries
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D142668: [BOLT] Add isParentOf and isSiblingOf BinaryFunction methods
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D144310: [BOLT][NFC] Return struct from evaluateX86MemoryOperand
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D137504: [PowerPC] Implement 64-bit ELFv2 Calling Convention in TableGen (for integers/floats/vectors in registers)
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D130487: [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D144068: [PowerPC] Add Binary Coded Decimal Assist Instructions
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Andrzej Warzynski via Phabricator via llvm-commits
- [PATCH] D144226: Allow inner-loop only reductions
Ankit via Phabricator via llvm-commits
- [PATCH] D144226: Allow inner-loop only reductions
Ankit via Phabricator via llvm-commits
- [PATCH] D144032: [InstCombine] Increase limit for max copied from constant fold
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D144162: [AnnotateUniformValues] Replace LegacyDA with Uniformity Analysis
Anshil Gandhi via Phabricator via llvm-commits
- [llvm] 388d679 - Recommit [YAML IO] Check that mapping doesn't contain duplicating keys
Anton Sidorenko via llvm-commits
- [llvm] 77bd15a - [MachineTraceMetrics][NFC] Move Strategy enum out of the class
Anton Sidorenko via llvm-commits
- [llvm] 980aa8d - [MachineTraceMetrics] Add local strategy
Anton Sidorenko via llvm-commits
- [llvm] 5bdd0be - [MachineCombiner][NFC] Rename `MinInstr` to `TraceEnsemble`
Anton Sidorenko via llvm-commits
- [llvm] 2693efa - [MachineCombiner] Support local strategy for traces
Anton Sidorenko via llvm-commits
- [llvm] 6f3a756 - [RISCV][NFC] Add missing immediate operand types.
Anton Sidorenko via llvm-commits
- [PATCH] D140539: [MachineTraceMetrics][NFC] Move Strategy enum out of the class
Anton Sidorenko via Phabricator via llvm-commits
- [PATCH] D140540: [MachineTraceMetrics] Add local strategy
Anton Sidorenko via Phabricator via llvm-commits
- [PATCH] D140541: [MachineCombiner][NFC] Rename `MinInstr` to `TraceEnsemble`
Anton Sidorenko via Phabricator via llvm-commits
- [PATCH] D140542: [MachineCombiner] Support local strategy for traces
Anton Sidorenko via Phabricator via llvm-commits
- [PATCH] D144105: [RISCV][NFC] Add missing immediate operand types.
Anton Sidorenko via Phabricator via llvm-commits
- [PATCH] D142234: [ConstantRange] Handle `Intrinsic::ctlz`
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D142234: [ConstantRange] Handle `Intrinsic::ctlz`
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D142234: [ConstantRange] Handle `Intrinsic::ctlz`
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D142234: [ConstantRange] Handle `Intrinsic::ctlz`
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D142234: [ConstantRange] Handle `Intrinsic::ctlz`
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D126122: Fix RUNPATH not accounting for LLVM_ENABLE_PER_TARGET_RUNTIME_DIR
Arcadiy Ivanov via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Argyrios Kyrtzidis via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Argyrios Kyrtzidis via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Argyrios Kyrtzidis via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Argyrios Kyrtzidis via Phabricator via llvm-commits
- [PATCH] D141736: [NVPTX] Use 'sm_60' architecture when expanding %ptxas-verify macro.
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D117118: [NVPTX] Fix shr/and pair replace with bfe
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D143601: Add LLVM type support for fp8
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D141736: [NVPTX] Use by default 'sm_60' architecture when expanding %ptxas-verify macro.
Artem Belevich via Phabricator via llvm-commits
- [llvm] ac6219d - Revert "[DAGCombiner] fix comments for D138899; NFC"
Arthur Eubanks via llvm-commits
- [llvm] 7c6b46e - Revert "[DAGCombiner] handle more store value forwarding"
Arthur Eubanks via llvm-commits
- [llvm] aecb36c - [GlobalOpt] Remove legacy pass
Arthur Eubanks via llvm-commits
- [llvm] b677d07 - [IPSCCP] Remove legacy pass
Arthur Eubanks via llvm-commits
- [llvm] bb692d4 - [gn build] Add missing count dependency for check-asan
Arthur Eubanks via llvm-commits
- [llvm] 4d16ebd - [Pipeline] Remove -enable-no-rerun-simplification-pipeline flag
Arthur Eubanks via llvm-commits
- [llvm] 5f5cf60 - [Pipeline] Remove -enable-npm-O3-nontrivial-unswitch flag
Arthur Eubanks via llvm-commits
- [llvm] b66fdba - [gn build] Manually port D143983
Arthur Eubanks via llvm-commits
- [llvm] b374423 - [Pipeline] Move ControlHeightReduction to module optimization pipeline
Arthur Eubanks via llvm-commits
- [llvm] 1ceb79e - Port PlaceSafepoints pass to the new pass manager
Arthur Eubanks via llvm-commits
- [llvm] c839981 - [gn build] Support building x86/64 Android libraries
Arthur Eubanks via llvm-commits
- [llvm] d73eb92 - [gn build] Support linux/win compiler-rt cross compilation
Arthur Eubanks via llvm-commits
- [llvm] 7a035de - Revert "[gn build] Support linux/win compiler-rt cross compilation"
Arthur Eubanks via llvm-commits
- [llvm] 998ad08 - Reland [gn build] Support linux/win compiler-rt cross compilation
Arthur Eubanks via llvm-commits
- [PATCH] D143958: [NFC][IR] Make Module::getAliasList() private
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D143958: [NFC][IR] Make Module::getAliasList() private
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D141731: [NFC] Makes mutable Function::getBasicBlockList() private
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D143958: [NFC][IR] Make Module::getAliasList() private
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D138899: [DAGCombiner] handle more store value forwarding
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D144027: [NFC][IR] Make Module::getGlobalList() private
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D144040: [NFC][IR] Force accesses to Function attributes go through getters/setters
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D143598: [gn build] Support building x86/64 Android libraries
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D143598: [gn build] Support building x86/64 Android libraries
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D143545: [gn build] Support linux/win compiler-rt cross compilation
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D143545: [gn build] Support linux/win compiler-rt cross compilation
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D136163: Port PlaceSafepoints pass to the new pass manager
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D144130: [Pipeline] Remove -enable-no-rerun-simplification-pipeline flag
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D98675: Remove -enable-npm-O3-nontrivial-unswitch option
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D144130: [Pipeline] Remove -enable-no-rerun-simplification-pipeline flag
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D98675: Remove -enable-npm-O3-nontrivial-unswitch option
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D98675: Remove -enable-npm-O3-nontrivial-unswitch option
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D136163: Port PlaceSafepoints pass to the new pass manager
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D143424: [Pipeline] Move ControlHeightReduction to module optimization pipeline
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D136163: Port PlaceSafepoints pass to the new pass manager
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D143598: [gn build] Support building x86/64 Android libraries
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D143545: [gn build] Support linux/win compiler-rt cross compilation
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D142589: [LV] Perform recurrence sinking directly on VPlan.
Ashay Rane via Phabricator via llvm-commits
- [PATCH] D142589: [LV] Perform recurrence sinking directly on VPlan.
Ashay Rane via Phabricator via llvm-commits
- [PATCH] D142589: [LV] Perform recurrence sinking directly on VPlan.
Ashay Rane via Phabricator via llvm-commits
- [PATCH] D143934: [AMDGPU] Do not apply schedule metric for regions with spilling
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D142589: [LV] Perform recurrence sinking directly on VPlan.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D143864: [VPlan] Replace AlsoPack field with shouldPack() method (NFC).
Ayal Zaks via Phabricator via llvm-commits
- [llvm] 697a162 - [AVR] Fix inaccurate offsets in PC relative branch instructions
Ben Shi via llvm-commits
- [PATCH] D143901: [AVR] Fix inaccurate offsets in PC relative branch instructions
Ben Shi via Phabricator via llvm-commits
- [PATCH] D143901: [AVR] Fix inaccurate offsets in PC relative branch instructions
Ben Shi via Phabricator via llvm-commits
- [llvm] da3623d - [JT] Always create BPI/BFI when running in legacy PM
Benjamin Kramer via llvm-commits
- [PATCH] D143513: [DebugInfo] Allow parsing line tables aligned to 4 or 8-byte boundaries
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D143513: [DebugInfo] Allow parsing line tables aligned to 4 or 8-byte boundaries
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D144297: Name threadpool threads.This gives our worker threads some names that allow easily identifying them in tools such as profilers and debuggers.
Benoit Jacob via Phabricator via llvm-commits
- [PATCH] D144297: Name threadpool threads.
Benoit Jacob via Phabricator via llvm-commits
- [PATCH] D143521: [llvm][LowerConstantIntrinsics] add debug statements
Bill Wendling via Phabricator via llvm-commits
- [PATCH] D142084: [RFC][X86][MemFold] Upgrade the mechanism of auto-generated Memory Folding Table
Bing Yu via Phabricator via llvm-commits
- [PATCH] D142084: [RFC][X86][MemFold] Upgrade the mechanism of auto-generated Memory Folding Table
Bing Yu via Phabricator via llvm-commits
- [PATCH] D142084: [RFC][X86][MemFold] Upgrade the mechanism of auto-generated Memory Folding Table
Bing Yu via Phabricator via llvm-commits
- [PATCH] D142084: [RFC][X86][MemFold] Upgrade the mechanism of auto-generated Memory Folding Table
Bing Yu via Phabricator via llvm-commits
- [PATCH] D142084: [RFC][X86][MemFold] Upgrade the mechanism of auto-generated Memory Folding Table
Bing Yu via Phabricator via llvm-commits
- [PATCH] D142084: [RFC][X86][MemFold] Upgrade the mechanism of auto-generated Memory Folding Table
Bing Yu via Phabricator via llvm-commits
- [PATCH] D142084: [RFC][X86][MemFold] Upgrade the mechanism of auto-generated Memory Folding Table
Bing Yu via Phabricator via llvm-commits
- [PATCH] D142084: [RFC][X86][MemFold] Upgrade the mechanism of auto-generated Memory Folding Table
Bing Yu via Phabricator via llvm-commits
- [PATCH] D143754: [MachineInstr] Introduce generic predicated copy opcode
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D143754: [MachineInstr] Introduce generic predicated copy opcode
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D143754: [MachineInstr] Introduce generic predicated copy opcode
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D143708: [RISCV] Add emulated TLS supported
Brad Smith via Phabricator via llvm-commits
- [PATCH] D144321: [PowerPC] Correctly use ELFv2 ABI on all OS's that use the ELFv2 ABI
Brad Smith via Phabricator via llvm-commits
- [PATCH] D144232: [PowerPC] Correctly use ELFv2 ABI on FreeBSD/powerpc64
Brad Smith via Phabricator via llvm-commits
- [PATCH] D144321: [PowerPC] Correctly use ELFv2 ABI on all OS's that use the ELFv2 ABI
Brad Smith via Phabricator via llvm-commits
- [PATCH] D144321: [PowerPC] Correctly use ELFv2 ABI on all OS's that use the ELFv2 ABI
Brad Smith via Phabricator via llvm-commits
- [PATCH] D144321: [PowerPC] Correctly use ELFv2 ABI on all OS's that use the ELFv2 ABI
Brad Smith via Phabricator via llvm-commits
- [PATCH] D144321: [PowerPC] Correctly use ELFv2 ABI on all OS's that use the ELFv2 ABI
Brad Smith via Phabricator via llvm-commits
- [PATCH] D141672: [RISCV] Support vector crypto extension ISA string and assembly
Brandon Wu via Phabricator via llvm-commits
- [llvm] 20cdf7c - [InstCombine] Increase limit for max copied from constant fold
Brendon Cahoon via llvm-commits
- [PATCH] D144032: [InstCombine] Increase limit for max copied from constant fold
Brendon Cahoon via Phabricator via llvm-commits
- [PATCH] D144032: [InstCombine] Increase limit for max copied from constant fold
Brendon Cahoon via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Brian Sumner via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Brian Sumner via Phabricator via llvm-commits
- [llvm] 7fbcc24 - [llvm-debuginfo-analyzer] (08a/09) - Memory Management
Carlos Alberto Enciso via llvm-commits
- [PATCH] D143716: [llvm-debuginfo-analyzer] LLVM 16.0.0-rc1 Failing test on osx-64.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D125784: [llvm-debuginfo-analyzer] 09 - CodeView Reader
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D125784: [llvm-debuginfo-analyzer] 09 - CodeView Reader
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Caroline via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Caroline via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Caroline via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Caroline via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Caroline via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Caroline via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Caroline via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Caroline via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Caroline via Phabricator via llvm-commits
- [llvm] 6ee2f77 - [PowerPC][GISel] add support for fpconstant
Chen Zheng via llvm-commits
- [PATCH] D133340: [PowerPC][GISel]select floating point constant from TOC
ChenZheng via Phabricator via llvm-commits
- [PATCH] D138899: [DAGCombiner] handle more store value forwarding
ChenZheng via Phabricator via llvm-commits
- [PATCH] D138899: [DAGCombiner] handle more store value forwarding
ChenZheng via Phabricator via llvm-commits
- [PATCH] D143997: [AIX] Lower some memory intrinsics to millicode functions on AIX
ChenZheng via Phabricator via llvm-commits
- [PATCH] D141673: [PowerPC] refactor eligible check for tail call optimization
ChenZheng via Phabricator via llvm-commits
- [PATCH] D141673: [PowerPC][NFC] refactor eligible check for tail call optimization
ChenZheng via Phabricator via llvm-commits
- [compiler-rt] 70758b8 - [scudo] Calling getStats requires holding lock
Chia-hung Duan via llvm-commits
- [compiler-rt] f7016f8 - [scudo] Call getStats when the region is exhausted
Chia-hung Duan via llvm-commits
- [compiler-rt] 4e3dac6 - [scudo] Call __scudo_deallocate_hook on reallocations.
Chia-hung Duan via llvm-commits
- [compiler-rt] 6a4c395 - [scudo] Add the thread-safety annotations
Chia-hung Duan via llvm-commits
- [compiler-rt] dfacba5 - [scudo] Update ring buffer test to make it accept zero size
Chia-hung Duan via llvm-commits
- [compiler-rt] 72584d9 - [scudo] Fix inconsistent signed/unsigned comparison
Chia-hung Duan via llvm-commits
- [compiler-rt] ae1bd3a - [scudo] Add thread-safety annotations on TSD data members
Chia-hung Duan via llvm-commits
- [compiler-rt] 94a391b - [scudo] Calling iterateOverChunks requires holding lock
Chia-hung Duan via llvm-commits
- [compiler-rt] a926977 - [scudo] Improve the uses of roundUpTo/roundDownTo/isAligned
Chia-hung Duan via llvm-commits
- [PATCH] D143854: [DirectX backend] remove string function attribute and unused module flags
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D143468: [CMake] Remove custom ccache CMake logic
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D143468: [CMake] Remove custom ccache CMake logic
Chris Cotter via Phabricator via llvm-commits
- [PATCH] D143873: [NFC] [llvm] Forward forwarding references
Chris Cotter via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add lookupOrTrap method to DenseMap
Chris Lattner via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add lookupOrTrap method to DenseMap and StringMap
Chris Lattner via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add lookupOrTrap method to DenseMap and StringMap
Chris Lattner via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add `at` method (assertive lookup) to DenseMap and StringMap
Chris Lattner via Phabricator via llvm-commits
- [llvm] b35d0a6 - [AMDGPU] Add switch to enable architected SGPRs.
Christudasan Devadasan via llvm-commits
- [llvm] 1c9e623 - [AMDGPU] Allow architected SGPRs for workgroup IDs
Christudasan Devadasan via llvm-commits
- [PATCH] D143707: [AMDGPU] Allow architected SGPRs for workgroup IDs
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D143707: [AMDGPU] Allow architected SGPRs for workgroup IDs
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D143706: [AMDGPU] Add switch to enable architected SGPRs.
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D143707: [AMDGPU] Allow architected SGPRs for workgroup IDs
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D143754: [MachineInstr] Introduce generic predicated copy opcode
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D143753: [MachineInstr] Introduce TII buildCopy helper functions (NFC).
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D143754: [MachineInstr] Introduce generic predicated copy opcode
Christudasan Devadasan via Phabricator via llvm-commits
- [llvm] af838c1 - [Coroutines] Don't run optimizations for optnone functions
Chuanqi Xu via llvm-commits
- [llvm] 7638409 - [RISCV] Make vsetvli intrinsics default to MA.
Craig Topper via llvm-commits
- [llvm] a411bc7 - [RISCV] Rename InstFormatCSZN->InstFormatCU to match latest Zcb spec. NFC
Craig Topper via llvm-commits
- [llvm] 2872987 - [InstCombine] Fix InstCombinerImpl::foldICmpMulConstant for nsw and nuw mul with unsigned compare.
Craig Topper via llvm-commits
- [llvm] 792a724 - [RISCV] Remove some vestiges of Zbp and Zbt extensions. NFC
Craig Topper via llvm-commits
- [llvm] 08ecef8 - [RISCV] Add CLB/CLH/SLB/SLH formats for Zcb instructions.
Craig Topper via llvm-commits
- [llvm] 052ae28 - [RISCV] Use !cond instead of multiple !if in RISCVInstrInfoVPseudos.td. NFC
Craig Topper via llvm-commits
- [llvm] 4305925 - [RISCV] Make a const member function static. NFC
Craig Topper via llvm-commits
- [llvm] 7e6e636 - Use llvm::has_single_bit<uint32_t> (NFC)
Craig Topper via llvm-commits
- [llvm] 22b564c - [RISCV] Add preferred function and loop alignment RISCVSubtarget. NFC
Craig Topper via llvm-commits
- [llvm] 42944ab - [RISCV] Improve isInterleaveShuffle to handle interleaving the high half and low half of the same source.
Craig Topper via llvm-commits
- [llvm] 2b2b840 - [RISCV] For rv32, accept constants like 0xfffff800 as a valid simm12.
Craig Topper via llvm-commits
- [llvm] 34aff47 - [RISCV] Use MCSubtargetInfo::hasFeature where possible. NFC
Craig Topper via llvm-commits
- [llvm] 78f106a - [RISCV] Handle RISCVISD::SplitF64 and RISCVISD::BuildPairF64 during isel with Zfa.
Craig Topper via llvm-commits
- [llvm] 3d0a5bf - [RISCV] Add Zfa test cases for strict ONE and UEQ comparisons. NFC
Craig Topper via llvm-commits
- [llvm] f962f50 - [RISCV] Remove Commutable property from Zfa fltq/fleq instructions.
Craig Topper via llvm-commits
- [llvm] 7f31a5c - [RISCV] Add fgtq.s and fgeq.s assembler aliases for Zfa.
Craig Topper via llvm-commits
- [llvm] bc8b6f6 - [RISCV] Add more tests for D144166. NFC
Craig Topper via llvm-commits
- [PATCH] D143908: [RISCV] edit document of Zcb to match the Implementation
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Don't let InstCombine re-sink the vastly more expensive fdiv
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143790: [RISCV] Make vsetvli intrinsics default to MA.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143673: [lld][RISCV][WIP] Implement GP relaxation for R_RISCV_HI20/R_RISCV_LO12_I/R_RISCV_LO12_S.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143942: [NFC] Replace -1U{LL} expressions with appropriate *_MAX macros in Support library.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143673: [lld][RISCV][WIP] Implement GP relaxation for R_RISCV_HI20/R_RISCV_LO12_I/R_RISCV_LO12_S.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D132819: [RISCV] Add MC support of RISCV zcmp Extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143942: [NFC] Replace -1U{LL} expressions with appropriate *_MAX macros in Support library.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143954: [ValueTracking] It is not safe to execute FDIV/FREM speculatively
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143954: [ValueTracking] It is not safe to execute FDIV/FREM speculatively
Craig Topper via Phabricator via llvm-commits
- [PATCH] D87479: [InstCombine] Don't sink the fdiv from (fmul (fdiv 1.0, %x), %y) if the fdiv isn't in the same basic block as the fmul
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143954: [ValueTracking] It is not safe to execute FDIV/FREM speculatively
Craig Topper via Phabricator via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D141984: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D140460: [RISCV][MC] Add FLI instruction support for the experimental zfa extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D142084: [RFC][X86][MemFold] Upgrade the mechanism of auto-generated Memory Folding Table
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143982: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143847: [RISCV] Add vendor-defined XTheadMAC (multiply-accumulate) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Don't let InstCombine re-sink the vastly more expensive fdiv
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Don't let InstCombine re-sink the vastly more expensive fdiv
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144038: [RISCV] Add CLB/CLH/SLB/SLH formats for Zcb instructions.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144048: [RISCV] Add preferred function and loop alignment RISCVSubtarget. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143838: [X86] Improve (select carry C1+1 C1)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143723: [RISCV] Increase default vectorizer LMUL to 2
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143766: [InstCombine] Fix InstCombinerImpl::foldICmpMulConstant for nsw and nuw mul with unsigned compare.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D133863: [RISCV] Add MC support of RISCV zcmt Extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143766: [InstCombine] Fix InstCombinerImpl::foldICmpMulConstant for nsw and nuw mul with unsigned compare.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D132435: [RISCV] Fold fp_to_int(ftrunc (X)) -> fp_to_int(X) for vector.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D142084: [RFC][X86][MemFold] Upgrade the mechanism of auto-generated Memory Folding Table
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144105: [RISCV][NFC] Add missing immediate operand types.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143345: [RFC][RISCV] Don't disassemble `addi`s with relocations as `mv`s
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143345: [RFC][RISCV] Don't disassemble `addi`s with relocations as `mv`s
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144038: [RISCV] Add CLB/CLH/SLB/SLH formats for Zcb instructions.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144143: [RISCV] Improve isInterleaveShuffle to handle interleaving the high half and low half of the same source.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143345: [RFC][RISCV] Don't disassemble `addi`s with relocations as `mv`s
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Craig Topper via Phabricator via llvm-commits
- [PATCH] D139452: [LLVM] Use dyn_cast instead of cast for objects that require it
Craig Topper via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Craig Topper via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Craig Topper via Phabricator via llvm-commits
- [PATCH] D140460: [RISCV][MC] Add FLI instruction support for the experimental zfa extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144166: [RISCV] For rv32, accept constants like 0xfffff800 as a valid simm12.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144166: [RISCV] For rv32, accept constants like 0xfffff800 as a valid simm12.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144175: [RISCV] Combine (store/load interleave, deinterleave) into vsseg2/vlseg2
Craig Topper via Phabricator via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for FLI instruction in experimental zfa extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143723: [RISCV] Increase default vectorizer LMUL to 2
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144166: [RISCV] For rv32, accept constants like 0xfffff800 as a valid simm12.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144143: [RISCV] Improve isInterleaveShuffle to handle interleaving the high half and low half of the same source.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144048: [RISCV] Add preferred function and loop alignment RISCVSubtarget. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144143: [RISCV] Improve isInterleaveShuffle to handle interleaving the high half and low half of the same source.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144143: [RISCV] Improve isInterleaveShuffle to handle interleaving the high half and low half of the same source.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144278: [RISCV] xtheadmac: fix commutativity issue for the in/out register
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144166: [RISCV] For rv32, accept constants like 0xfffff800 as a valid simm12.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144288: [RISCV] Add missing plumbing and tests for zfa
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144300: [RISCV] Use MCSubtargetInfo::hasFeature where possible. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144300: [RISCV] Use MCSubtargetInfo::hasFeature where possible. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144249: [RISCV] Add vendor-defined XTheadMemIdx (Indexed Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144288: [RISCV] Add missing plumbing and tests for zfa
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144175: [RISCV] Combine (store/load interleave, deinterleave) into vsseg2/vlseg2
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144351: llvm-tblgen: Let each emitter self-contained
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144354: [WebAssembly] Split WebAssemblyUtils to fix library layering for MC tools.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for FLI instruction in experimental zfa extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for FLI instruction in experimental zfa extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D140460: [RISCV][MC] Add FLI instruction support for the experimental zfa extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144366: [RISCV]Add more pattern for fma ins
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144366: [RISCV]Add more pattern for fma ins
Craig Topper via Phabricator via llvm-commits
- [llvm] b861b12 - [TextAPI] Implement TBDv5 Reader
Cyndy Ishida via llvm-commits
- [llvm] 4be1764 - [TextAPI] wrap returned Errors in std::move
Cyndy Ishida via llvm-commits
- [llvm] 07e3ca2 - Revert "[TextAPI] Implement TBDv5 Reader"
Cyndy Ishida via llvm-commits
- [lld] 79320a0 - Reland "[TextAPI] Implement TBDv5 Reader"
Cyndy Ishida via llvm-commits
- [llvm] b70d87b - [TextAPI] Capture new properties from TBD to InterfaceFile
Cyndy Ishida via llvm-commits
- [llvm] 4384127 - [llvm-tapi-diff] add default case to switch for symbol flags
Cyndy Ishida via llvm-commits
- [PATCH] D144156: commit dca28ccb3218330e9c6fb7c93453fb84e5cf129c Author: Cyndy Ishida <cyndy_ishida at apple.com> Date: Tue Feb 14 20:50:46 2023 -0800
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144156: commit dca28ccb3218330e9c6fb7c93453fb84e5cf129c Author: Cyndy Ishida <cyndy_ishida at apple.com> Date: Tue Feb 14 20:50:46 2023 -0800
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144158: [TextAPI] Capture new properties from TBD to InterfaceFile
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144156: [TextAPI] Implement TBDv5 Reader
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144156: [TextAPI] Implement TBDv5 Reader
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144156: [TextAPI] Implement TBDv5 Reader
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144158: [TextAPI] Capture new properties from TBD to InterfaceFile
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144158: [TextAPI] Capture new properties from TBD to InterfaceFile
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144158: [TextAPI] Capture new properties from TBD to InterfaceFile
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144156: [TextAPI] Implement TBDv5 Reader
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144158: [TextAPI] Capture new properties from TBD to InterfaceFile
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144156: [TextAPI] Implement TBDv5 Reader
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144156: [TextAPI] Implement TBDv5 Reader
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144158: [TextAPI] Capture new properties from TBD to InterfaceFile
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D144339: [TextAPI] Implement TBDv5 Writer
Cyndy Ishida via Phabricator via llvm-commits
- [PATCH] D63904: [Android] Use ELF TLS for Android API level 29+
Dan Albert via Phabricator via llvm-commits
- [compiler-rt] 8007bcc - [llvm-cov] Create syntax to pass source w/o binary.
Daniel Thornburgh via llvm-commits
- [PATCH] D144207: [llvm-cov] Create syntax to pass source w/o binary.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D144207: [llvm-cov] Create syntax to pass source w/o binary.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D144207: [llvm-cov] Create syntax to pass source w/o binary.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D144207: [llvm-cov] Create syntax to pass source w/o binary.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D144207: [llvm-cov] Create syntax to pass source w/o binary.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D144308: [llvm-cov] Optionally fail on missing binary ID
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D144298: [Local][SimplifyCFG] Handle !nontemporal in combineMetadata
Daniel Woodworth via Phabricator via llvm-commits
- [PATCH] D144271: [AMDGPU][MC] Enable modifiers on V_MOV_B32
Danilo Milosevic via Phabricator via llvm-commits
- [PATCH] D144271: [AMDGPU][MC] Enable modifiers on V_MOV_B32
Danilo Milosevic via Phabricator via llvm-commits
- [PATCH] D143713: [ARM] Fix Chain/Glue Bug in PerformVMOVhrCombine
Dave Green via Phabricator via llvm-commits
- [PATCH] D142594: [AArch64] Eliminating the use of integer unit in moving from a Neon scalar result of a uaddlv to a Neon vector
Dave Green via Phabricator via llvm-commits
- [PATCH] D142589: [LV] Perform recurrence sinking directly on VPlan.
Dave Green via Phabricator via llvm-commits
- [PATCH] D143143: [AArch64] Reassociate sub(x, add(m1, m2)) to sub(sub(x, m1), m2)
Dave Green via Phabricator via llvm-commits
- [PATCH] D143157: [AArch64] Add NZCV Def for TLSDESC_CALLSEQ
Dave Green via Phabricator via llvm-commits
- [PATCH] D143157: [AArch64] Add NZCV Def for TLSDESC_CALLSEQ
Dave Green via Phabricator via llvm-commits
- [PATCH] D143988: [AArch64] Always lower fp16 zero to FMOVH0
Dave Green via Phabricator via llvm-commits
- [PATCH] D144014: [LSR] Improve filtered uses in NarrowSearchSpaceByPickingWinnerRegs
Dave Green via Phabricator via llvm-commits
- [PATCH] D144018: [AArch64] More consistently use buildvector for zero and all-ones constants
Dave Green via Phabricator via llvm-commits
- [PATCH] D143968: [NFC][IR] Make Module::getIFuncList() private.
Dave Green via Phabricator via llvm-commits
- [PATCH] D144086: [AArch64] Load into zero vector patterns
Dave Green via Phabricator via llvm-commits
- [PATCH] D142288: [X86] Add basic vector handling for ISD::ABDS/ABDU (absolute difference) nodes
Dave Green via Phabricator via llvm-commits
- [PATCH] D143988: [AArch64] Always lower fp16 zero to FMOVH0
Dave Green via Phabricator via llvm-commits
- [PATCH] D142359: [TTI][AArch64] Cost model vector INS instructions
Dave Green via Phabricator via llvm-commits
- [PATCH] D144014: [LSR] Improve filtered uses in NarrowSearchSpaceByPickingWinnerRegs
Dave Green via Phabricator via llvm-commits
- [PATCH] D144014: [LSR] Improve filtered uses in NarrowSearchSpaceByPickingWinnerRegs
Dave Green via Phabricator via llvm-commits
- [PATCH] D144018: [AArch64] More consistently use buildvector for zero and all-ones constants
Dave Green via Phabricator via llvm-commits
- [PATCH] D144018: [AArch64] More consistently use buildvector for zero and all-ones constants
Dave Green via Phabricator via llvm-commits
- [PATCH] D121088: [AArch64] Concat zip1 and zip2 is a wider zip1
Dave Green via Phabricator via llvm-commits
- [PATCH] D142279: [cmake] Use LLVM_ENABLE_ASSERTIONS to enable assertions in libstdc++
David Blaikie via Phabricator via llvm-commits
- [PATCH] D142279: [cmake] Use LLVM_ENABLE_ASSERTIONS to enable assertions in libstdc++
David Blaikie via Phabricator via llvm-commits
- [PATCH] D142556: [DebugInfo] Merge partially matching chains of inlined locations
David Blaikie via Phabricator via llvm-commits
- [PATCH] D143942: [NFC] Replace -1U{LL} expressions with appropriate *_MAX macros in Support library.
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
David Blaikie via Phabricator via llvm-commits
- [PATCH] D142283: [Support] Make llvm-symbolizer runs for stack traces work on Apple platforms
David Blaikie via Phabricator via llvm-commits
- [PATCH] D143760: [Codeview] Fix incorrect size determination for Fortran complex types.
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
David Blaikie via Phabricator via llvm-commits
- [PATCH] D143760: [Codeview] Fix incorrect size determination for complex types.
David Blaikie via Phabricator via llvm-commits
- [PATCH] D142556: [DebugInfo] Merge partially matching chains of inlined locations
David Blaikie via Phabricator via llvm-commits
- [PATCH] D144180: [llvm][DebugInfo] Add Annotations parameter to DIBuilder::createMethod
David Blaikie via Phabricator via llvm-commits
- [PATCH] D144165: [ADT] Provide C++20-style bit functions
David Blaikie via Phabricator via llvm-commits
- [llvm] e9eaee9 - [AArch64] Reassociate sub(x, add(m1, m2)) to sub(sub(x, m1), m2)
David Green via llvm-commits
- [llvm] 4198ff0 - [AArch64] Add NZCV Def for TLSDESC_CALLSEQ
David Green via llvm-commits
- [llvm] 5a81d0e - [AArch64] Remove dead isReflexive methods. NFC
David Green via llvm-commits
- [llvm] b0bfbad - [AArch64] Always lower fp16 zero to FMOVH0
David Green via llvm-commits
- [llvm] 8a7b5e0 - [AArch64] Guard extra uses in mls combine.
David Green via llvm-commits
- [llvm] 66749ce - [ARM] Add Thumb LSR codegen tests. NFC
David Green via llvm-commits
- [llvm] 7abe349 - [LSR] Improve filtered uses in NarrowSearchSpaceByPickingWinnerRegs
David Green via llvm-commits
- [llvm] 8e3dc13 - [AArch64] Concat zip1 and zip2 is a wider zip1
David Green via llvm-commits
- [llvm] fd4d298 - [ARM] Add targets for Arm DebugInfo tests. NFC
David Green via llvm-commits
- [PATCH] D143631: [LTO] Don't let InstCombine re-sink the vastly more expensive fdiv
David Sherwood via Phabricator via llvm-commits
- [PATCH] D142894: [LoopVectorize] Use overflow-check analysis to improve tail-folding.
David Sherwood via Phabricator via llvm-commits
- [PATCH] D143276: [SME2][AArch64] Add multi-single multiply-add long long intrinsics
David Sherwood via Phabricator via llvm-commits
- [PATCH] D144018: [AArch64] More consistently use buildvector for zero and all-ones constants
David Sherwood via Phabricator via llvm-commits
- [PATCH] D143277: [SME2][AArch64] Add multi-multi multiply-add long long intrinsics
David Sherwood via Phabricator via llvm-commits
- [PATCH] D143278: [SME2][AArch64] Add multi-indexed multiply-add long long intrinsics
David Sherwood via Phabricator via llvm-commits
- [llvm] fdd18e8 - [llvm][TableGen][Jupyter] Show llvm-tblgen not found error in notebook
David Spickett via llvm-commits
- [llvm] 94676cf - [llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
David Spickett via llvm-commits
- [llvm] 93164db - [llvm][AArch64] Fix BTI after returns_twice when call has no attributes
David Spickett via llvm-commits
- [lld] 0e1fb48 - [lld-macho] Use uint64_t instead of size_t to fix 32 bit test failures
David Spickett via llvm-commits
- [PATCH] D142531: [llvm][TableGen][Jupyter] Show llvm-tblgen not found error in notebook
David Spickett via Phabricator via llvm-commits
- [PATCH] D143915: [llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
David Spickett via Phabricator via llvm-commits
- [PATCH] D143915: [llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
David Spickett via Phabricator via llvm-commits
- [PATCH] D143915: [llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
David Spickett via Phabricator via llvm-commits
- [PATCH] D143915: [llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
David Spickett via Phabricator via llvm-commits
- [PATCH] D143915: [llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
David Spickett via Phabricator via llvm-commits
- [PATCH] D143235: [AArch64] Avoid lowering setjmp call to CALL_BTI if harden-sls-blr is enabled
David Spickett via Phabricator via llvm-commits
- [PATCH] D143915: [llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
David Spickett via Phabricator via llvm-commits
- [PATCH] D143915: [llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
David Spickett via Phabricator via llvm-commits
- [PATCH] D143915: [llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
David Spickett via Phabricator via llvm-commits
- [PATCH] D144082: [llvm][AArch64] Fix BTI after returns_twice when call has no attributes
David Spickett via Phabricator via llvm-commits
- [PATCH] D144082: [llvm][AArch64] Fix BTI after returns_twice when call has no attributes
David Spickett via Phabricator via llvm-commits
- [PATCH] D144082: [llvm][AArch64] Fix BTI after returns_twice when call has no attributes
David Spickett via Phabricator via llvm-commits
- [PATCH] D144029: [lld-macho] Account for alignment in thunk insertion algorithm
David Spickett via Phabricator via llvm-commits
- [PATCH] D132647: [LLVM][TableGen] Add JSON magic directive to Jupyter kernel
David Spickett via Phabricator via llvm-commits
- [PATCH] D142556: [DebugInfo] Merge partially matching chains of inlined locations
David Stenberg via Phabricator via llvm-commits
- [PATCH] D142556: [DebugInfo] Merge partially matching chains of inlined locations
David Stenberg via Phabricator via llvm-commits
- [PATCH] D142556: [DebugInfo] Merge partially matching chains of inlined locations
David Stenberg via Phabricator via llvm-commits
- [llvm] 35106ad - [Coroutines] Presubmit test for more coro remats
David Stuttard via llvm-commits
- [llvm] 3e51af9 - [Coroutines] Improve rematerialization stage
David Stuttard via llvm-commits
- [llvm] c4f7cc8 - [Coroutines] Modify CoroFrame materializable into a callback
David Stuttard via llvm-commits
- [PATCH] D142619: [Coroutines] Presubmit test for more coro remats
David Stuttard via Phabricator via llvm-commits
- [PATCH] D142620: [Coroutines] Improve rematerialization stage
David Stuttard via Phabricator via llvm-commits
- [PATCH] D142621: [Couroutines] Modify CoroFrame materializable into a callback
David Stuttard via Phabricator via llvm-commits
- [PATCH] D143406: [MIPS] Asm: Improved diagnostics when a memory operand and unsupported CPU feature are involved
Davide Mor via Phabricator via llvm-commits
- [PATCH] D143887: [BOLT][AArch64] Replace NOP with adrp in AdrRelaxationPass to preserve relative offsets.
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
DianQK via Phabricator via llvm-commits
- [llvm] 819dfc3 - [AMDGPU] Autogenerate checks for several tests. NFCI
Diana Picus via llvm-commits
- [PATCH] D144176: [AMDGPU] Add cross-project-tests for WMMA builtins
Diana Picus via Phabricator via llvm-commits
- [PATCH] D144176: [AMDGPU] Add cross-project-tests for WMMA builtins
Diana Picus via Phabricator via llvm-commits
- [PATCH] D144176: [AMDGPU] Add cross-project-tests for WMMA builtins
Diana Picus via Phabricator via llvm-commits
- [PATCH] D144176: [AMDGPU] Add cross-project-tests for WMMA builtins
Diana Picus via Phabricator via llvm-commits
- [PATCH] D144176: [AMDGPU] Add cross-project-tests for WMMA builtins
Diana Picus via Phabricator via llvm-commits
- [PATCH] D139864: [AIX] Demangle the name prefix with '.' in AIX OS for llvm-cxxfilt
Digger Lin via Phabricator via llvm-commits
- [PATCH] D139864: [AIX] Demangle the name prefix with '.' in AIX OS for llvm-cxxfilt
Digger Lin via Phabricator via llvm-commits
- [PATCH] D144232: [PowerPC] Correctly use ELFv2 ABI on FreeBSD/powerpc64
Dimitry Andric via Phabricator via llvm-commits
- [PATCH] D144321: [PowerPC] Correctly use ELFv2 ABI on all OS's that use the ELFv2 ABI
Dimitry Andric via Phabricator via llvm-commits
- [llvm] d44b31e - [DAGCombine] Allow DAGCombine to remove dead masked stores.
Dinar Temirbulatov via llvm-commits
- [PATCH] D143069: [DAGCombine] Allow DAGCombine to remove dead masked stores
Dinar Temirbulatov via Phabricator via llvm-commits
- [PATCH] D143069: [DAGCombine] Allow DAGCombine to remove dead masked stores
Dinar Temirbulatov via Phabricator via llvm-commits
- [PATCH] D143069: [DAGCombine] Allow DAGCombine to remove dead masked stores
Dinar Temirbulatov via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Dmitrii Kosarev via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Dmitrii Kosarev via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Dmitrii Kosarev via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Dmitrii Kosarev via Phabricator via llvm-commits
- [PATCH] D143259: [SCEV] Support umin/smin in SCEVLoopGuardRewriter
Dmitry Makogon via Phabricator via llvm-commits
- [PATCH] D144105: [RISCV][NFC] Add missing immediate operand types.
Dmitry via Phabricator via llvm-commits
- [PATCH] D144105: [RISCV][NFC] Add missing immediate operand types.
Dmitry via Phabricator via llvm-commits
- [PATCH] D144105: [RISCV][NFC] Add missing immediate operand types.
Dmitry via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
Dávid Bolvanský via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
Dávid Bolvanský via Phabricator via llvm-commits
- [PATCH] D141666: [RISCV] Proper support of extensions Zicsr and Zifencei
Elena Lepilkina via Phabricator via llvm-commits
- [PATCH] D141666: [RISCV] Proper support of extensions Zicsr and Zifencei
Elena Lepilkina via Phabricator via llvm-commits
- [PATCH] D143898: [CodeGenPrepare] Fold addressing mode into calls
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D140123: [TLS] Clamp the alignment of TLS global variables if required by the target
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D140160: [llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D140160: [llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D140123: [TLS] Clamp the alignment of TLS global variables if required by the target
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D140123: [TLS] Clamp the alignment of TLS global variables if required by the target
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D143898: [CodeGenPrepare] Fold addressing mode into calls
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D134282: [CGP] Add generic TargetLowering::shouldAlignPointerArgs() implementation
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D137707: Move "auto-init" instructions to the dominator of their users
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D143961: [llvm][SelectionDAGBuilder] use getRegistersForValue to generate legal copies
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D137707: Move "auto-init" instructions to the dominator of their users
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D143796: [SelectionDAG] Negate constant offset before morphing load/store node with pre-dec/post-dec addressing mode.
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D143812: [X86][Win64] Avoid statepoints prior to SEH epilogue
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D143796: [AArch64][ISel] Always use pre-inc/post-inc addressing mode for auto-indexed load/store with constant offset.
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D143796: [AArch64][ISel] Always use pre-inc/post-inc addressing mode for auto-indexed load/store with constant offset.
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D111862: [AArch64] Canonicalize X*(Y+1) or X*(1-Y) to madd/msub
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D134282: [CGP] Add generic TargetLowering::shouldAlignPointerArgs() implementation
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D143619: [llvm][codegen] Disallow default Emulated TLS for RISCV
Elliott Hughes via Phabricator via llvm-commits
- [llvm] 87d02e0 - Recommit "[Support] change StringMap hash function from djbHash to xxHash"
Erik Desjardins via llvm-commits
- [compiler-rt] 87d02e0 - Recommit "[Support] change StringMap hash function from djbHash to xxHash"
Erik Desjardins via llvm-commits
- [PATCH] D143997: [AIX] Lower some memory intrinsics to millicode functions on AIX
Esme Yi via Phabricator via llvm-commits
- [PATCH] D143725: [llvm-objdump][ARM] support --symbolize-operands for ARM/ELF
Esme Yi via Phabricator via llvm-commits
- [PATCH] D144356: [XCOFF] support the ref directive for object generation.
Esme Yi via Phabricator via llvm-commits
- [llvm] a1b78fb - [JT][CT] Preserve exisiting BPI/BFI during JumpThreading
Evgeniy Brevnov via llvm-commits
- [PATCH] D136827: [JT][CT] Preserve exisiting BPI/BFI during JumpThreading
Evgeniy via Phabricator via llvm-commits
- [llvm] 17b097b - [runtimes] Set LLVM_ENABLE_PER_TARGET_RUNTIME_DIR_default to ON for OS390
Fanbo Meng via llvm-commits
- [PATCH] D143916: [runtimes] Set LLVM_ENABLE_PER_TARGET_RUNTIME_DIR_default to ON for OS390
Fanbo Meng via Phabricator via llvm-commits
- [PATCH] D143916: [runtimes] Set LLVM_ENABLE_PER_TARGET_RUNTIME_DIR_default to ON for OS390
Fanbo Meng via Phabricator via llvm-commits
- [llvm] df3e73d - [LoopDeletion] Simplify. NFC
Fangrui Song via llvm-commits
- [llvm] 1e69211 - Move global namespace cl::opt inside llvm::
Fangrui Song via llvm-commits
- [llvm] eb5530e - [LoopDistribute] Remove legacy pass
Fangrui Song via llvm-commits
- [llvm] ae0c203 - [LoopLoadElimination] Remove legacy pass
Fangrui Song via llvm-commits
- [llvm] 10eea3f - [LoopVersioning] Remove legacy pass
Fangrui Song via llvm-commits
- [llvm] 26662ac - [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Fangrui Song via llvm-commits
- [llvm] 766065a - [LoopUnrollAndJam] Remove legacy pass
Fangrui Song via llvm-commits
- [llvm] a409f3c - [LoopVersioningLICM] Remove legacy pass
Fangrui Song via llvm-commits
- [llvm] c1eb3db - [LoopFuse] Remove legacy pass
Fangrui Song via llvm-commits
- [llvm] 6f3e6a7 - Revert D129735 "[RISCV] Add new pass to transform undef to pseudo for vector values."
Fangrui Song via llvm-commits
- [llvm] 21ccddd - [LoopInterchange] Remove legacy pass (unused in the pipeline)
Fangrui Song via llvm-commits
- [llvm] 48bfed7 - [LoopFlatten] Remove legacy pass (unused in the pipeline)
Fangrui Song via llvm-commits
- [llvm] e7d3f43 - [LoopFlatten] Inline an external linkage function not in llvm::. NFC
Fangrui Song via llvm-commits
- [llvm] 4eee778 - [LoopReroll] Remove legacy pass (unused in the pipeline)
Fangrui Song via llvm-commits
- [llvm] 7081e59 - [MC] Remove an unneeded comparison on cast result. NFC
Fangrui Song via llvm-commits
- [llvm] f62b084 - [LoopDeletion] Remove legacy pass
Fangrui Song via llvm-commits
- [llvm] 956c7dc - [Object][NFC] Remove unneeded llvm_unreachable
Fangrui Song via llvm-commits
- [llvm] d9e4c10 - [AArch64] Simplify with MCSubtargetInfo::hasFeature. NFC
Fangrui Song via llvm-commits
- [llvm] 432caca - Simplify with hasFeature. NFC
Fangrui Song via llvm-commits
- [polly] d7c4590 - [LoopIdiomRecognize] Remove legacy pass
Fangrui Song via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D140201: [lld][ARM][NFCI][1/3]Big Endian support - Removing assumptions
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D139092: [RFC][LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D144062: Fix bazel build
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D139487: [NFC] Use const references to avoid copying objects in for-loops
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D140202: [lld][ARM][2/3]Big Endian support - Word invariant support
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D144183: [X86][MC] Fix the bug of -output-asm-variant=1 for intel syntax
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D144183: [X86][MC] Fix the bug of -output-asm-variant=1 for intel syntax
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D144210: [TableGen] Delete support for deprecated positional matching.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D139452: [Object][NFC] Remove unneeded llvm_unreachable
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D139452: [Object][NFC] Remove unneeded llvm_unreachable
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143708: [RISCV] Add emulated TLS supported
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143708: [RISCV] Add emulated TLS supported
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D45508: Implement --ctors-in-init-array.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D45508: Implement --ctors-in-init-array.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143693: [llvm-readobj] Add --memtag
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143693: [llvm-readobj] Add --memtag
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143769: [lld] [MTE] Add DT_AARCH64_MEMTAG_* dynamic entries, and small cleanup
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D144302: [PGO] Setting ValueProfNode Array's Alignment
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D143921: [debug-info][codegen] Prevent creation of self-referential SP node
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D143921: [debug-info][codegen] Prevent creation of self-referential SP node
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D143921: [debug-info][codegen] Prevent creation of self-referential SP node
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D143921: [debug-info][codegen] Prevent creation of self-referential SP node
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D143921: [debug-info][codegen] Prevent creation of self-referential SP node
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D144366: [RISCV]Add more pattern for fma ins
Feng Wang via Phabricator via llvm-commits
- [llvm] af3c25d - [VPlan] Fix iterator invalidation in adjustFixedOrderRecurrences.
Florian Hahn via llvm-commits
- [llvm] 807d432 - [VPlan] Use properlyDominates predicate for ordering FOR users.
Florian Hahn via llvm-commits
- [llvm] f044217 - [ConstraintElim] Add reproducer remarks.
Florian Hahn via llvm-commits
- [llvm] a3d1de3 - [LV] Move invalid cost remark code to separate function (NFC).
Florian Hahn via llvm-commits
- [llvm] b32b706 - [ConstraintSystem] Use sparse representation for constraints. (NFC)
Florian Hahn via llvm-commits
- [llvm] 1538761 - [LSR] Add test case which shows additional LSR with D144050.
Florian Hahn via llvm-commits
- [llvm] 2ac85cd - [AMDGPU] Regenerate check lines to enable updating for D144050.
Florian Hahn via llvm-commits
- [llvm] 5356fef - [SCCP] Remove legacy SCCP pass.
Florian Hahn via llvm-commits
- [llvm] a9a1950 - Revert "[SCCP] Remove legacy SCCP pass."
Florian Hahn via llvm-commits
- [llvm] 7737c05 - [VPlan] Make sure properlyDominates(A, A) returns false.
Florian Hahn via llvm-commits
- [llvm] f61c9b7 - [SLP] Fix infinite loop in isUndefVector.
Florian Hahn via llvm-commits
- [PATCH] D142589: [LV] Perform recurrence sinking directly on VPlan.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143323: [ConstraintElim] Add reproducer remarks.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D142594: [AArch64] Eliminating the use of integer unit in moving from a Neon scalar result of a uaddlv to a Neon vector
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D142589: [LV] Perform recurrence sinking directly on VPlan.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143938: [VPlan] Compute costs for plans directly after construction (WIP).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D142669: [VPlan] Allow planning with different cost models (WIP).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D142015: [LV] Plan with and without FoldTailByMasking
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D142109: [LoopVectorize] Remove runtime check and scalar tail loop when tail-folding.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D142589: [LV] Perform recurrence sinking directly on VPlan.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143957: [LV] Move invalid cost remark code to separate function (NFC).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143323: [ConstraintElim] Add reproducer remarks.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143323: [ConstraintElim] Add reproducer remarks.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143246: [SCEV][NFC] Remove check for rewriteable types
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144050: [SCEV] Strengthen nowrap flags via ranges for ARs on construction.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144051: [SCEV] Do not strengthen nuw/nsw flags during get[Zero,Sign]ExtendedExpr.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143409: [SCEV][IndVarSimplify] Add nsw/nuw falgs to binary ops before visiting IVUsers
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144066: [Pseudo probe] Duplicate probes in vectorized loop body.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144014: [LSR] Improve filtered uses in NarrowSearchSpaceByPickingWinnerRegs
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144137: [PseudoProbe] Refactoring a test
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143957: [LV] Move invalid cost remark code to separate function (NFC).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144197: [SCEV] Also strengthen flags of expr for BEValue.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144050: [SCEV] Strengthen nowrap flags via ranges for ARs on construction.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144050: [SCEV] Strengthen nowrap flags via ranges for ARs on construction.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144201: [SCCP] Remove legacy SCCP pass.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144292: [SLP] Fix infinite loop in isUndefVector.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144201: [SCCP] Remove legacy SCCP pass.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144201: [SCCP] Remove legacy SCCP pass.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144292: [SLP] Fix infinite loop in isUndefVector.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144292: [SLP] Fix infinite loop in isUndefVector.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144201: [SCCP] Remove legacy SCCP pass.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144050: [SCEV] Strengthen nowrap flags via ranges for ARs on construction.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144050: [SCEV] Strengthen nowrap flags via ranges for ARs on construction.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144316: [SCEV] Fix FoldID::addInteger(unsigned long I)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143259: [SCEV] Support umin/smin in SCEVLoopGuardRewriter
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144332: [Polly] Remove CodegenCleanupPass.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143905: [LV] Harden the test of the minmax with index pattern. (NFC)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143864: [VPlan] Replace AlsoPack field with shouldPack() method (NFC).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D143865: [VPlan] Add predicate to VPReplicateRecipe, expand region later.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D144292: [SLP] Fix infinite loop in isUndefVector.
Florian Hahn via Phabricator via llvm-commits
- [llvm] 853a46c - Revert "llvm-reduce: Run instruction reduction last"
Florian Mayer via llvm-commits
- [PATCH] D144027: [NFC][IR] Make Module::getGlobalList() private
Florian Mayer via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Florian Mayer via Phabricator via llvm-commits
- [PATCH] D142725: [DFAJumpThreading] Enable DFAJT with LTO
Gabor Marton via Phabricator via llvm-commits
- [PATCH] D144010: [X86] AMD Znver4 (Genoa) Scheduler enablement
Ganesh Gopalasubramanian via Phabricator via llvm-commits
- [PATCH] D143804: [bazel] create a clang-tidy binary target
Geoffrey Martin-Noble via Phabricator via llvm-commits
- [PATCH] D143804: [bazel] create a clang-tidy binary target
Geoffrey Martin-Noble via Phabricator via llvm-commits
- [PATCH] D117118: [NVPTX] Fix shr/and pair replace with bfe
Georgi Mirazchiyski via Phabricator via llvm-commits
- [PATCH] D117118: [NVPTX] Fix shr/and pair replace with bfe
Georgi Mirazchiyski via Phabricator via llvm-commits
- [llvm] 0fa5df1 - [LV] Synthesize all true masks for masked vector function variants
Graham Hunter via llvm-commits
- [PATCH] D132458: [LoopVectorize] Synthesize mask operands for vector variants as needed
Graham Hunter via Phabricator via llvm-commits
- [PATCH] D143519: [lit] [PATCH 2/2] Add "--reduced-xunit-report" option
Greg Bedwell via Phabricator via llvm-commits
- [PATCH] D143678: [bazel] Add layering-check
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D143678: [bazel] Add layering-check
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D143678: [bazel] Add layering-check
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D144207: [llvm-cov] Create syntax to pass source w/o binary.
Gulfem Savrun Yeniceri via Phabricator via llvm-commits
- [PATCH] D144207: [llvm-cov] Create syntax to pass source w/o binary.
Gulfem Savrun Yeniceri via Phabricator via llvm-commits
- [PATCH] D143954: [ValueTracking] It is not safe to execute FDIV/FREM speculatively
Guozhi Wei via Phabricator via llvm-commits
- [PATCH] D143954: [ValueTracking] It is not safe to execute FDIV/FREM speculatively
Guozhi Wei via Phabricator via llvm-commits
- [PATCH] D143841: [Propeller] Make decoding BBAddrMaps trace through relocations
Han Shen via Phabricator via llvm-commits
- [PATCH] D143225: [SROA] Create additional vector type candidates based on store and load slices
Han Zhu via Phabricator via llvm-commits
- [PATCH] D143225: [SROA] Create additional vector type candidates based on store and load slices
Han Zhu via Phabricator via llvm-commits
- [PATCH] D143225: [SROA] Create additional vector type candidates based on store and load slices
Han Zhu via Phabricator via llvm-commits
- [PATCH] D144223: [SROA] Fix bug where RankVectorTypes is used in std::unique
Han Zhu via Phabricator via llvm-commits
- [PATCH] D143225: [SROA] Create additional vector type candidates based on store and load slices
Han Zhu via Phabricator via llvm-commits
- [PATCH] D144223: [SROA] Fix bug where RankVectorTypes is used in std::unique
Han Zhu via Phabricator via llvm-commits
- [PATCH] D143225: [SROA] Create additional vector type candidates based on store and load slices
Han Zhu via Phabricator via llvm-commits
- [PATCH] D144084: [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D144084: [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D144172: [Support] [Windows] Don't check file access time in equivalent(file_status, file_status)
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D144084: [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D144172: [Support] [Windows] Don't check file access time in equivalent(file_status, file_status)
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D143760: [Codeview] Fix incorrect size determination for complex types.
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D143545: [gn build] Support linux/win compiler-rt cross compilation
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D143598: [gn build] Support building x86/64 Android libraries
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D144172: [Support] [Windows] Don't check file access time in equivalent(file_status, file_status)
Hans Wennborg via Phabricator via llvm-commits
- [llvm] 9c14132 - [AArch64][SME]: Add missing Ops that need custom-lowering in streaming mode.
Hassnaa Hamdi via llvm-commits
- [llvm] fefe729 - [AArch64][SME]: Custom-lower SIGN_EXTEND_INREG for streaming SVE
Hassnaa Hamdi via llvm-commits
- [llvm] bf987e1 - [AArch64][SME]: Custom lower select and fp_extend for streaming SVE
Hassnaa Hamdi via llvm-commits
- [llvm] 39eb1c6 - [CSSPGO][Preinliner] Set default value of sample-profile-inline-limit-max to 50000.
Hongtao Yu via llvm-commits
- [llvm] eddec9d - [Pseudo probe] Duplicate probes in vectorized loop body.
Hongtao Yu via llvm-commits
- [llvm] c38c8d6 - [PseudoProbe] Refactoring a test
Hongtao Yu via llvm-commits
- [PATCH] D143696: [CSSPGO][Preinliner] Set default value of sample-profile-inline-limit-max to 50000.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D143725: [llvm-objdump][ARM] support --symbolize-operands for ARM/ELF
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D143948: [loop unroll] Fix `branch-weights` for unrolled loop.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D144066: [Pseudo probe] Duplicate probes in vectorized loop body.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D144066: [Pseudo probe] Duplicate probes in vectorized loop body.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D144066: [Pseudo probe] Duplicate probes in vectorized loop body.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D144066: [Pseudo probe] Duplicate probes in vectorized loop body.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D144066: [Pseudo probe] Duplicate probes in vectorized loop body.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D144137: [PseudoProbe] Refactoring a test
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D144066: [Pseudo probe] Duplicate probes in vectorized loop body.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D144137: [PseudoProbe] Refactoring a test
Hongtao Yu via Phabricator via llvm-commits
- [llvm] fb7c380 - [AArch64][ISel] Always use pre-inc/post-inc addressing mode for auto-indexed load/store with constant offset.
Huihui Zhang via llvm-commits
- [PATCH] D143796: [SelectionDAG] Negate constant offset before morphing load/store node with pre-dec/post-dec addressing mode.
Huihui Zhang via Phabricator via llvm-commits
- [PATCH] D143796: [AArch64][ISel] Always use pre-inc/post-inc addressing mode for auto-indexed load/store with constant offset.
Huihui Zhang via Phabricator via llvm-commits
- [PATCH] D143796: [AArch64][ISel] Always use pre-inc/post-inc addressing mode for auto-indexed load/store with constant offset.
Huihui Zhang via Phabricator via llvm-commits
- [PATCH] D143796: [AArch64][ISel] Always use pre-inc/post-inc addressing mode for auto-indexed load/store with constant offset.
Huihui Zhang via Phabricator via llvm-commits
- [PATCH] D140559: [InlineAdvisor] Restructure advisor plugin unittest cmake
IBricchi via Phabricator via llvm-commits
- [PATCH] D140637: [InlineOrder] Plugin Inline Order
IBricchi via Phabricator via llvm-commits
- [PATCH] D140637: [InlineOrder] Plugin Inline Order
IBricchi via Phabricator via llvm-commits
- [PATCH] D140637: [InlineOrder] Plugin Inline Order
IBricchi via Phabricator via llvm-commits
- [PATCH] D140588: [unittest] Restructure plugin cmake target
IBricchi via Phabricator via llvm-commits
- [PATCH] D140588: [unittest] Restructure plugin cmake target
IBricchi via Phabricator via llvm-commits
- [PATCH] D144323: [libunwind][Modules] Add unwind_arm_ehabi.h and unwind_itanium.h to the unwind module)
Ian Anderson via Phabricator via llvm-commits
- [PATCH] D135248: [libc++] implement move_iterator<T*> should be a random access iterator
Igor Zhukov via Phabricator via llvm-commits
- [PATCH] D135248: [libc++] implement move_iterator<T*> should be a random access iterator
Igor Zhukov via Phabricator via llvm-commits
- [PATCH] D143107: [SPIR-V] Emit spv_undef intrinsic for aggregate undef operands
Ilia Diachkov via Phabricator via llvm-commits
- [PATCH] D142375: [AMDGPU][CodeGen] Combine SDAG and global isel tests for intersect ray intrinsics.
Ivan Kosarev via Phabricator via llvm-commits
- [llvm] a225d89 - [DebugInfo][Docs] Fix broken link in instruction referencing doc
J. Ryan Stinnett via llvm-commits
- [PATCH] D140806: Change getProcessTriple to return different archs in universal binary
Jacques Pienaar via Phabricator via llvm-commits
- [llvm] acbb15e - Revert "[extract_symbols.py] Adjust how the output of nm is interpreted"
Jake Egan via llvm-commits
- [llvm] 08533f8 - Revert "[CGP] Add generic TargetLowering::shouldAlignPointerArgs() implementation"
Jake Egan via llvm-commits
- [llvm] 5b455a8 - [InlineAdvisor] Restructure advisor plugin unittest cmake
Jake Egan via llvm-commits
- [PATCH] D142989: [extract_symbols.py] Better handling of templates
Jake Egan via Phabricator via llvm-commits
- [PATCH] D140559: [InlineAdvisor] Restructure advisor plugin unittest cmake
Jake Egan via Phabricator via llvm-commits
- [PATCH] D134282: [CGP] Add generic TargetLowering::shouldAlignPointerArgs() implementation
Jake Egan via Phabricator via llvm-commits
- [llvm] bc6e10c - [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections
James Henderson via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
James Henderson via Phabricator via llvm-commits
- [PATCH] D143852: [docs] Add Python coding standard to documentation
James Henderson via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
James Henderson via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
James Henderson via Phabricator via llvm-commits
- [PATCH] D139097: [ARM] Add option --print-raw-value to llvm-nm to dump raw symbol values in case of ARM
James Henderson via Phabricator via llvm-commits
- [PATCH] D143693: [llvm-readobj] Add --memtag
James Henderson via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
James Henderson via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
James Henderson via Phabricator via llvm-commits
- [PATCH] D144009: [obj2yaml] Save offset for segments and size for PHDR
James Henderson via Phabricator via llvm-commits
- [PATCH] D143841: [Propeller] Make decoding BBAddrMaps trace through relocations
James Henderson via Phabricator via llvm-commits
- [PATCH] D139864: [AIX] Demangle the name prefix with '.' in AIX OS for llvm-cxxfilt
James Henderson via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
James Henderson via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
James Henderson via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
James Henderson via Phabricator via llvm-commits
- [PATCH] D143074: [LangRef] improve documentation of SNaN in the default FP environment
James Y Knight via Phabricator via llvm-commits
- [PATCH] D143505: [InstSimplify] fix/improve folding with an SNaN operand
James Y Knight via Phabricator via llvm-commits
- [PATCH] D143505: [InstSimplify] fix/improve folding with an SNaN operand
James Y Knight via Phabricator via llvm-commits
- [PATCH] D144210: [TableGen] Delete support for deprecated positional matching.
James Y Knight via Phabricator via llvm-commits
- [PATCH] D136163: Port PlaceSafepoints pass to the new pass manager
Jan Dupej (MSFT) via Phabricator via llvm-commits
- [PATCH] D136163: Port PlaceSafepoints pass to the new pass manager
Jan Dupej (MSFT) via Phabricator via llvm-commits
- [PATCH] D136163: Port PlaceSafepoints pass to the new pass manager
Jan Dupej (MSFT) via Phabricator via llvm-commits
- [llvm] e3515ba - Reapply "[AMDGPU] Modify adjustInliningThreshold to also consider the cost of passing function arguments through the stack"
Janek van Oirschot via llvm-commits
- [PATCH] D143498: Reapply "[AMDGPU] Modify adjustInliningThreshold to also consider the cost of passing function arguments through the stack"
Janek van Oirschot via Phabricator via llvm-commits
- [llvm] c5085c9 - [CodeGen] Trivial simplification of some getRegisterType calls. NFC.
Jay Foad via llvm-commits
- [llvm] c76acb9 - [UniformityAnalysis] Fix some file headers and pass names
Jay Foad via llvm-commits
- [llvm] 9305b63 - [AMDGPU] Add another G_UNMERGE_VALUES legalization test case
Jay Foad via llvm-commits
- [llvm] 8e5a41e - Revert "AMDGPU: Override getNegatedExpression constant handling"
Jay Foad via llvm-commits
- [llvm] 8a17cd9 - AMDGPU: Add a regression test case for D143963
Jay Foad via llvm-commits
- [llvm] 62e4f81 - [AMDGPU] Simplify widenScalar condition for BigTy for G_(UN)MERGE_VALUES
Jay Foad via llvm-commits
- [PATCH] D143707: [AMDGPU] Allow architected SGPRs for workgroup IDs
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143707: [AMDGPU] Allow architected SGPRs for workgroup IDs
Jay Foad via Phabricator via llvm-commits
- [PATCH] D142279: [cmake] Use LLVM_ENABLE_ASSERTIONS to enable assertions in libstdc++
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add lookupOrTrap method to DenseMap and StringMap
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144070: [llvm][GenericUniformity] Prevent assert while calculating temporal divergence
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143941: AMDGPU: Teach getNegatedExpression about rcp
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add `at` method (assertive lookup) to DenseMap and StringMap
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144033: [AMDGPU][MC][GFX11] Add partial NSA format for image sample instructions
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143195: ValueTracking: Add start of computeKnownFPClass API
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144167: [UniformityAnalysis] Fix some file headers and pass names
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144167: [UniformityAnalysis] Fix some file headers and pass names
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144167: [UniformityAnalysis] Fix some file headers and pass names
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144167: [UniformityAnalysis] Fix some file headers and pass names
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144176: [AMDGPU] Add cross-project-tests for WMMA builtins
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144167: [UniformityAnalysis] Fix some file headers and pass names
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144167: [UniformityAnalysis] Fix some file headers and pass names
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143963: AMDGPU: Override getNegatedExpression constant handling
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143963: AMDGPU: Override getNegatedExpression constant handling
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143963: AMDGPU: Override getNegatedExpression constant handling
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144198: [AMDGPU] Check exact width in get*ClassForBitWidth
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144198: [AMDGPU] Check exact width in get*ClassForBitWidth
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143963: AMDGPU: Override getNegatedExpression constant handling
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143742: [VirtRegMap] Further optimize emitting KILL for copy
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143945: [AMDGPU] Add legalization case for PTR_ADD on buffer pointers
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144250: [AMDGPU] Simplify widenScalar condition for BigTy for G_(UN)MERGE_VALUES
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144250: [AMDGPU] Simplify widenScalar condition for BigTy for G_(UN)MERGE_VALUES
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144250: [AMDGPU] Simplify widenScalar condition for BigTy for G_(UN)MERGE_VALUES
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144250: [AMDGPU] Simplify widenScalar condition for BigTy for G_(UN)MERGE_VALUES
Jay Foad via Phabricator via llvm-commits
- [PATCH] D144254: [llvm][Uniformity] a phi with an undef argument is not always divergent
Jay Foad via Phabricator via llvm-commits
- [PATCH] D143981: Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Jeremy Maitin-Shepard via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Jeremy Maitin-Shepard via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Jeremy Maitin-Shepard via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Jeremy Maitin-Shepard via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Jeremy Maitin-Shepard via Phabricator via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Jeremy Maitin-Shepard via Phabricator via llvm-commits
- [PATCH] D111159: [UnknownProvenance] Introduce UnknownProvenance constant
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D111160: [UnknownProvenance] Add LLVM-IR support for unknown_provenance
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D111161: [UnknownProvenance] Add bitcode support.
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D111163: [UnknownProvenance] add support in ValueMapper
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D104268: [ptr_provenance] Introduce optional ptr_provenance operand to load/store
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D104269: [ptr_provenance] Parser support for the optional ptr_provenance operand
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D104270: [ptr_provenance] Bitcode reader/writer support for the optional ptr_provenance operand of load/store instructions
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D111751: [ptr_provenance] Add llvm-c support.
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D107352: [MemoryLocation] learn about ptr_provenance
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D107354: [MachineMemOperand] learn about ptr_provenance
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D107355: [ptr_provenance] Introduce llvm.experimental.ptr.provenance
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D128813: [unknown_provenance] Verifier: check it only exists on the ptr_provenance path
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D107356: [Lowering] Support lowering of llvm.experimental.ptr.provenance.
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D107357: [getUnderlyingObject] support ptr_provenance
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D143924: [RISCV][docs] Describe status of zicsr and zifencei
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143468: [CMake] Remove custom ccache CMake logic
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143982: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143248: Emit CFI directives in epilogue and enable CFIFixup pass for RISC-V.
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143345: [RFC][RISCV] Don't disassemble `addi`s with relocations as `mv`s
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143317: [m68k] Add TLS support
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143982: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D144168: StackProtector: instrument noreturn paths before the call
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D144168: StackProtector: instrument noreturn paths before the call
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143708: [RISCV] Add emulated TLS supported
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143708: [RISCV] Add emulated TLS supported
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D144215: [WIP][RISCV] Accept zicntr and zihpm command line options
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143708: [RISCV] Support emulated TLS
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D140208: [AMDGPU] Improved wide multiplies
Jessica Del via Phabricator via llvm-commits
- [PATCH] D143323: [ConstraintElim] Add reproducer remarks.
Jessica Paquette via Phabricator via llvm-commits
- [PATCH] D141066: CodeExtractor: Fix creating addrspacecasts for lifetime markers
Jessica Paquette via Phabricator via llvm-commits
- [PATCH] D144303: [GlobalISel] Combine out-of-range shifts to undef
Jessica Paquette via Phabricator via llvm-commits
- [lld] 8198f30 - [lld-macho] Account for alignment in thunk insertion algorithm
Jez Ng via llvm-commits
- [PATCH] D144020: [lld] Estimate think slope size instead of using a magic constant
Jez Ng via Phabricator via llvm-commits
- [PATCH] D144029: [lld-macho] Account for alignment in thunk insertion algorithm
Jez Ng via Phabricator via llvm-commits
- [PATCH] D144020: [lld] Estimate think slope size instead of using a magic constant
Jez Ng via Phabricator via llvm-commits
- [PATCH] D144029: [lld-macho] Account for alignment in thunk insertion algorithm
Jez Ng via Phabricator via llvm-commits
- [PATCH] D144029: [lld-macho] Account for alignment in thunk insertion algorithm
Jez Ng via Phabricator via llvm-commits
- [PATCH] D144029: [lld-macho] Account for alignment in thunk insertion algorithm
Jez Ng via Phabricator via llvm-commits
- [PATCH] D144153: [lld-macho] Support re-exports of individual symbols
Jez Ng via Phabricator via llvm-commits
- [PATCH] D144029: [lld-macho] Account for alignment in thunk insertion algorithm
Jez Ng via Phabricator via llvm-commits
- [PATCH] D142916: [lld-macho] Warn on method name collisions from category definitions
Jez Ng via Phabricator via llvm-commits
- [PATCH] D142916: [lld-macho] Warn on method name collisions from category definitions
Jez Ng via Phabricator via llvm-commits
- [PATCH] D143901: [AVR] Fix inaccurate offsets in PC relative branch instructions
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D133829: [RISCV] Add cost model for insertelement/extractelement of vector type that should be splitted.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D132435: [RISCV] Fold fp_to_int(ftrunc (X)) -> fp_to_int(X) for vector.
Jianjian Guan via Phabricator via llvm-commits
- [llvm] 7495a2e - [Attributor][FIX] Ensure we adjust types properly
Johannes Doerfert via llvm-commits
- [PATCH] D142569: [OpenMP] Introduce kernel environment
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D144053: [LICM] Ensure LICM can hoist invariant.group
Johannes Doerfert via Phabricator via llvm-commits
- [llvm] 1edb04b - [extract_symbols.py] Adjust usage of nm again
John Brawn via llvm-commits
- [llvm] e5d9146 - [extract_symbols.py] Be more permissive when examining nm output
John Brawn via llvm-commits
- [PATCH] D142989: [extract_symbols.py] Better handling of templates
John Brawn via Phabricator via llvm-commits
- [PATCH] D144221: [amdgpu][nfc] Replace ad hoc LDS frame recalculation with absolute_symbol MD
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D144221: [amdgpu][nfc] Replace ad hoc LDS frame recalculation with absolute_symbol MD
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D144233: [WIP][amdgpu] Implement dynamic LDS accesses from non-kernel functions
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D144221: [amdgpu][nfc] Replace ad hoc LDS frame recalculation with absolute_symbol MD
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D144233: [WIP][amdgpu] Implement dynamic LDS accesses from non-kernel functions
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D144221: [amdgpu][nfc] Replace ad hoc LDS frame recalculation with absolute_symbol MD
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D144221: [amdgpu][nfc] Replace ad hoc LDS frame recalculation with absolute_symbol MD
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D144128: [SLP] Check with target before vectorizing GEP Indices
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D144128: [SLP] Check with target before vectorizing GEP Indices
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D144128: [SLP] Check with target before vectorizing GEP Indices
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D144128: [SLP] Check with target before vectorizing GEP Indices
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Josh Berdine via Phabricator via llvm-commits
- [PATCH] D136537: [llvm-ocaml] Assume pointers are at least 2-bit aligned
Josh Berdine via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Josh Berdine via Phabricator via llvm-commits
- [llvm] e19d9ee - [SCEV] Add automated test checks for some tests
Joshua Cao via llvm-commits
- [PATCH] D142330: [AssumptionCache] caches @llvm.experimental.guard's
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D144343: [ConstantRange][SCEV] print unsigned ranges
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D144343: [ConstantRange][SCEV] print unsigned ranges
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D143195: ValueTracking: Add start of computeKnownFPClass API
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D142907: LangRef: Add "dynamic" option to "denormal-fp-math"
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D142907: LangRef: Add "dynamic" option to "denormal-fp-math"
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D141008: [Clang][SPIR-V] Emit target extension types for OpenCL types on SPIR-V.
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D141008: [Clang][SPIR-V] Emit target extension types for OpenCL types on SPIR-V.
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D136861: [IR] Add LLVM IR support for target("aarch64.svcount") type.
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D136861: [IR] Add LLVM IR support for target("aarch64.svcount") type.
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D144119: feat: harden permissions for all github workflows
Joyce via Phabricator via llvm-commits
- [PATCH] D144119: feat: harden permissions for all github workflows
Joyce via Phabricator via llvm-commits
- [PATCH] D143535: github: Add manual workflow to build and upload release binaries
Joyce via Phabricator via llvm-commits
- [llvm] 54c136e - [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Jun Sha via llvm-commits
- [llvm] 321cd52 - Update: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Jun Sha via llvm-commits
- [llvm] fc6d517 - [RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)
Jun Sha via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension
Jun Sha via Phabricator via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension
Jun Sha via Phabricator via llvm-commits
- [PATCH] D143982: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)
Jun Sha via Phabricator via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension
Jun Sha via Phabricator via llvm-commits
- [PATCH] D141984: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Jun Sha via Phabricator via llvm-commits
- [PATCH] D141984: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Jun Sha via Phabricator via llvm-commits
- [PATCH] D143982: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)
Jun Sha via Phabricator via llvm-commits
- [PATCH] D140460: [RISCV][MC] Add FLI instruction support for the experimental zfa extension
Jun Sha via Phabricator via llvm-commits
- [PATCH] D143982: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)
Jun Sha via Phabricator via llvm-commits
- [PATCH] D140460: [RISCV][MC] Add FLI instruction support for the experimental zfa extension
Jun Sha via Phabricator via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension
Jun Sha via Phabricator via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for FLI instruction in experimental zfa extension
Jun Sha via Phabricator via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for FLI instruction in experimental zfa extension
Jun Sha via Phabricator via llvm-commits
- [PATCH] D144017: [Support] Make LLVM_EXTERNAL_VISIBILITY meaningful on Windows
Jun Zhang via Phabricator via llvm-commits
- [PATCH] D144017: [Support] Make LLVM_EXTERNAL_VISIBILITY meaningful on Windows
Jun Zhang via Phabricator via llvm-commits
- [PATCH] D144017: [Support] Make LLVM_EXTERNAL_VISIBILITY meaningful on Windows
Jun Zhang via Phabricator via llvm-commits
- [PATCH] D144017: [Support] Make LLVM_EXTERNAL_VISIBILITY meaningful on Windows
Jun Zhang via Phabricator via llvm-commits
- [PATCH] D144360: [WebAssembly] Add more combine pattern for vector shift
JunMa via Phabricator via llvm-commits
- [llvm] c726b34 - Add a test for D144333
Juneyoung Lee via llvm-commits
- [llvm] 2ad0cc9 - [DivRemPairs] Strip division's poison generating flag
Juneyoung Lee via llvm-commits
- [PATCH] D144116: [DAGCombiner] Avoid converting (x or/xor const) + y to (x + y) + const if benefit is unclear
Juneyoung Lee via Phabricator via llvm-commits
- [PATCH] D144116: [DAGCombiner] Avoid converting (x or/xor const) + y to (x + y) + const if benefit is unclear
Juneyoung Lee via Phabricator via llvm-commits
- [PATCH] D144116: [DAGCombiner] Avoid converting (x or/xor const) + y to (x + y) + const if benefit is unclear
Juneyoung Lee via Phabricator via llvm-commits
- [PATCH] D144333: [DivRemPairs] Strip division's poison generating flagGiven this transformation: X % Y -> X - (X / Y) * YThis patch strips off the poison-generating flag of X / Y such as exact, because it may make the optimized form result poison whereas X % Y...
Juneyoung Lee via Phabricator via llvm-commits
- [PATCH] D144333: [DivRemPairs] Strip division's poison generating flag
Juneyoung Lee via Phabricator via llvm-commits
- [PATCH] D144333: [DivRemPairs] Strip division's poison generating flag
Juneyoung Lee via Phabricator via llvm-commits
- [llvm] fd766ba - [GISelEmitter][NFC] Correct path of GISel's td file in the comment.
Kai Luo via llvm-commits
- [PATCH] D143977: [GISel]]RFC] Allow match against iPTR operand in leaf node
Kai Luo via Phabricator via llvm-commits
- [PATCH] D143979: [GISel][PowerPC][WIP] Support G_ATOMICRMW_*
Kai Luo via Phabricator via llvm-commits
- [PATCH] D143979: [GISel][PowerPC][WIP] Support G_ATOMICRMW_*
Kai Luo via Phabricator via llvm-commits
- [PATCH] D143979: [GISel][PowerPC][WIP] Support G_ATOMICRMW_*
Kai Luo via Phabricator via llvm-commits
- [PATCH] D143979: [GISel][PowerPC][WIP] Support G_ATOMICRMW_*
Kai Luo via Phabricator via llvm-commits
- [PATCH] D143979: [GISel][PowerPC][WIP] Support G_ATOMICRMW_*
Kai Luo via Phabricator via llvm-commits
- [PATCH] D127563: [PowerPC] Fix llvm.ppc.cfence on float point types
Kai Luo via Phabricator via llvm-commits
- [PATCH] D144235: [PowerPC][NFC] add const-splat-array-init.ll
Kai Luo via Phabricator via llvm-commits
- [PATCH] D134599: [RISCV] Add CodeGen support of RISCV zcmp Extension
KaiYi via Phabricator via llvm-commits
- [PATCH] D133103: [PowerPC] Improve kill flag computation and add verification after MI peephole
Kamau Bridgeman via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144183: [X86][MC] Fix the bug of -output-asm-variant=1 for intel syntax
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144183: [X86][MC] Fix the bug of -output-asm-variant=1 for intel syntax
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144183: [X86][MC] Fix the bug of -output-asm-variant=1 for intel syntax
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144183: [X86][MC] Fix the bug of -output-asm-variant=1 for intel syntax
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144183: [X86][MC] Fix the bug of -output-asm-variant=1 for intel syntax
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144183: [X86][MC] Fix the bug of -output-asm-variant=1 for intel syntax
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144244: [X86]rearange X86InstrInfo.td
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144244: [X86]rearange X86InstrInfo.td
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D144154: [X86]Use Class to refactor ArithMetic td file in X86
Kan Shengchen via Phabricator via llvm-commits
- [llvm] f1f62ed - [ADT] Add llvm::rotl and llvm::rotr to bit.h
Kazu Hirata via llvm-commits
- [llvm] df77dec - [AArch64] Use llvm::rotl and llvm::rotr (NFC)
Kazu Hirata via llvm-commits
- [llvm] 639b786 - [RISCV] Use llvm::rotl (NFC)
Kazu Hirata via llvm-commits
- [llvm] 5e78b74 - [ARM] Use llvm::rotl and llvm::rotr (NFC)
Kazu Hirata via llvm-commits
- [llvm] 64dad4b - Use llvm::bit_cast (NFC)
Kazu Hirata via llvm-commits
- [llvm] 0f52c1f - [llvm] Deprecate {Bits,Float,Double}To{Bits,Float,Double} (NFC)
Kazu Hirata via llvm-commits
- [llvm] 4dfd5a3 - [llvm] Use std::optional instead of llvm::Optional (NFC)
Kazu Hirata via llvm-commits
- [llvm] 68e81d7 - [ADT] Use llvm::rotr (NFC)
Kazu Hirata via llvm-commits
- [llvm] 7e6e636 - Use llvm::has_single_bit<uint32_t> (NFC)
Kazu Hirata via llvm-commits
- [llvm] 7e6e636 - Use llvm::has_single_bit<uint32_t> (NFC)
Kazu Hirata via llvm-commits
- [llvm] 93de5f1 - [CodeGen] Fix warnings
Kazu Hirata via llvm-commits
- [llvm] 7c9df77 - [ADT] Provide C++20-style bit functions
Kazu Hirata via llvm-commits
- [llvm] 04d59f2 - [IR] Fix a warning
Kazu Hirata via llvm-commits
- [llvm] cbde212 - Use APInt::popcount instead of APInt::countPopulation (NFC)
Kazu Hirata via llvm-commits
- [llvm] f8f3db2 - Use APInt::count{l,r}_{zero,one} (NFC)
Kazu Hirata via llvm-commits
- [llvm] a7baaab - Use APInt::isZero instead of APInt::isNulLValue (NFC)
Kazu Hirata via llvm-commits
- [llvm] 4a05edd - [llvm] Use APInt::getZero instead of APInt::getNullValue (NFC)
Kazu Hirata via llvm-commits
- [llvm] b7ffd96 - Use APInt::getAllOnes instead of APInt::getAllOnesValue (NFC)
Kazu Hirata via llvm-commits
- [llvm] 9e5d249 - Use APInt::isOne instead of APInt::isOneValue (NFC)
Kazu Hirata via llvm-commits
- [llvm] 397265d - [llvm] Use APInt::isAllOnes instead of isAllOnesValue (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D143882: [ADT] Add llvm::rotl and llvm::rotr to bit.h
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D143882: [ADT] Add llvm::rotl and llvm::rotr to bit.h
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D143838: [X86] Improve (select carry C1+1 C1)
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D143838: [X86] Improve (select carry C1+1 C1)
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D143990: [llvm] Deprecate {Bits,Float,Double}To{Bits,Float,Double} (NFC)
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D143990: [llvm] Deprecate {Bits,Float,Double}To{Bits,Float,Double} (NFC)
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D143838: [X86] Improve (select carry C1+1 C1)
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D144165: [ADT] Provide C++20-style bit functions
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D144165: [ADT] Provide C++20-style bit functions
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D144329: [InstCombine] canonicalize "extract lowest set bit" away from cttz intrinsic
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D143838: [X86] Improve (select carry C1+1 C1)
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D89492: [compiler-rt] Enable building builtins using top-level CMake file
Kazushi Marukawa via Phabricator via llvm-commits
- [llvm] ba23bca - [SME2][AArch64] Add multi-single multiply-add long long intrinsics
Kerry McLaughlin via llvm-commits
- [PATCH] D143276: [SME2][AArch64] Add multi-single multiply-add long long intrinsics
Kerry McLaughlin via Phabricator via llvm-commits
- [PATCH] D143278: [SME2][AArch64] Add multi-indexed multiply-add long long intrinsics
Kerry McLaughlin via Phabricator via llvm-commits
- [PATCH] D143277: [SME2][AArch64] Add multi-multi multiply-add long long intrinsics
Kerry McLaughlin via Phabricator via llvm-commits
- [PATCH] D144118: [SME2][AArch64] Add multi-vector rounding shift left intrinsics
Kerry McLaughlin via Phabricator via llvm-commits
- [PATCH] D143276: [SME2][AArch64] Add multi-single multiply-add long long intrinsics
Kerry McLaughlin via Phabricator via llvm-commits
- [PATCH] D142907: LangRef: Add "dynamic" option to "denormal-fp-math"
Kevin P. Neal via Phabricator via llvm-commits
- [PATCH] D143671: [Flang][OpenMP] Added parser support for device_type clause
Kiran Chandramohan via Phabricator via llvm-commits
- [PATCH] D137763: [RISCV] precommit test for D129735
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D142458: [SPARC] Implement hooks for conditional branch relaxation
Koakuma via Phabricator via llvm-commits
- [PATCH] D142458: [SPARC] Implement hooks for conditional branch relaxation
Koakuma via Phabricator via llvm-commits
- [PATCH] D144012: [SPARC][MC] Fix encoding of backwards BPr branches
Koakuma via Phabricator via llvm-commits
- [PATCH] D142461: [SPARC] Lower BR_CC to BPr on 64-bit target whenever possible
Koakuma via Phabricator via llvm-commits
- [PATCH] D144076: [test][InstCombine] Add a test case for constant folding for uniformly initialized array
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D144184: [InstSimplify] fold LoadInst for uniformaly initialized constant global variables
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D144184: [InstSimplify] fold LoadInst for uniformaly initialized constant global variables
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D144184: [InstSimplify] fold LoadInst for uniformaly initialized constant global variables
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D144076: [test][InstCombine] Add a test case for constant folding for uniformly initialized array
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D144184: [InstSimplify] fold LoadInst for uniformaly initialized constant global variables
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D144184: [InstSimplify] fold LoadInst for uniformaly initialized constant global variables
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D144184: [InstSimplify] fold LoadInst for uniformaly initialized constant global variables
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D144312: [AMDGPU] Add tests for future commit
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D144313: [AMDGPU] Improve the lowering of buffer_load_{u8, u16} intrinsics.
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D144313: [AMDGPU] Improve the lowering of buffer_load_{u8, u16} intrinsics.
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D144313: [AMDGPU] Improve the lowering of buffer_load_{u8, u16} intrinsics.
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D144313: [AMDGPU] Improve the lowering of raw_buffer_load_{i8,i16} and struct_buffer_load_{i8,i16} intrinsics
Konstantina Mitropoulou via Phabricator via llvm-commits
- [llvm] 5dde2bc - [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
Kristina Bessonova via llvm-commits
- [PATCH] D144079: [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D144079: [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D144079: [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D144079: [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D143984: [DebugMetadata] Simplify handling subprogram's retainedNodes field. NFCI (1/7)
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D143985: [DwarfDebug] Move emission of imported entities from beginModule() to endModule() (2/7)
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D144004: [DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D144005: [DwarfDebug] Move emission of types from beginModule() to endModule() (4/7)
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D144006: [DebugMetadata][DwarfDebug] Support function-local types in lexical block scopes (5/7)
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D144007: [DwarfDebug] Move emission of globals from beginModule() to endModule() (6/7)
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D144008: [DebugMetadata][DwarfDebug] Support function-local static variables in lexical block scopes (7/7)
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D113741: [RFC][DwarfDebug][AsmPrinter] Support emitting function-local declaration for a lexical block
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D114705: [DwarfDebug] Move emission of global vars, types and imports to endModule() (2/5)
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D125693: [DebugInfo] Support types, imports and static locals declared in a lexical block (3/5)
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D144079: [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D144344: [BOLT] Attempt to fix bolt/test/runtime/AArch64/adrrelaxationpass.s after D144079
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D144344: [BOLT] Attempt to fix bolt/test/runtime/AArch64/adrrelaxationpass.s after D144079
Kristina Bessonova via Phabricator via llvm-commits
- [PATCH] D143915: [llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
Kristof Beyls via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143945: [AMDGPU] Add legalization case for PTR_ADD on buffer pointers
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143945: [AMDGPU] Add legalization case for PTR_ADD on buffer pointers
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143945: [AMDGPU] Add legalization case for PTR_ADD on buffer pointers
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143522: [AMDGPU] Set a data layout entry for buffer descriptors (addrspace 7)
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143515: [AsmPrinter] Add hook to override constant folding for printing.
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143945: [AMDGPU] Add legalization case for PTR_ADD on buffer pointers
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143945: [AMDGPU] Add legalization case for PTR_ADD on buffer pointers
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Krzysztof Drewniak via Phabricator via llvm-commits
- [llvm] e96f994 - Revert "[Hexagon] Add release note for LLVM 16"
Krzysztof Parzyszek via llvm-commits
- [llvm] 3574274 - [Hexagon] Fix number of arguments in call to DAG.getNode for VINSERTW0
Krzysztof Parzyszek via llvm-commits
- [PATCH] D134040: Remove sqrt and rsqrt related files from clspv libclc target SOURCES
Kévin Petit via Phabricator via llvm-commits
- [PATCH] D134887: Add more generic builtin implementations to clspv's libclc SOURCES
Kévin Petit via Phabricator via llvm-commits
- [PATCH] D132362: Add clspv to libclc targets exempt from alwaysinline
Kévin Petit via Phabricator via llvm-commits
- [llvm] 5dc400e - [gn build] Port 7f5d130a428f
LLVM GN Syncbot via llvm-commits
- [llvm] 9e6e96f - [gn build] Port f1c4241fb6e5
LLVM GN Syncbot via llvm-commits
- [llvm] 7058f08 - [gn build] Port 6f3e6a765a9e
LLVM GN Syncbot via llvm-commits
- [llvm] 76c638d - [gn build] Port 46db8d822ecd
LLVM GN Syncbot via llvm-commits
- [llvm] 783cbf7 - [gn build] Port bf0f94a5cf82
LLVM GN Syncbot via llvm-commits
- [llvm] 3479543 - [gn build] Port b861b1225380
LLVM GN Syncbot via llvm-commits
- [llvm] e49b93e - [gn build] Port 07e3ca238e68
LLVM GN Syncbot via llvm-commits
- [llvm] 5e262d5 - [gn build] Port 79320a0c3f82
LLVM GN Syncbot via llvm-commits
- [llvm] 171ffd4 - [ORC] StaticLibraryDefinitionGenerator -- support in-memory universal binaries.
Lang Hames via llvm-commits
- [llvm] ef6d474 - [ORC] Add ELFNixPlatform::Create overload -- Pass ORC runtime as def generator.
Lang Hames via llvm-commits
- [PATCH] D144083: [JITLink] Initial 32-bit ARM backend
Lang Hames via Phabricator via llvm-commits
- [PATCH] D144083: [JITLink] Initial 32-bit ARM backend
Lang Hames via Phabricator via llvm-commits
- [PATCH] D144276: [ORC] Introduce SetUpExecutorNativePlatform utility.
Lang Hames via Phabricator via llvm-commits
- [PATCH] D142888: [compiler-rt] Fix building GWPASAN on ARM
Leandro Lupori via Phabricator via llvm-commits
- [compiler-rt] 913b4aa - Reland "[compiler-rt][hwasan] Add unused attribute to GetRegisters"
Leonard Chan via llvm-commits
- [compiler-rt] d6ff080 - [hwasan] Add definitions for missing operator delete functions
Leonard Chan via llvm-commits
- [compiler-rt] 6313ece - Revert "[hwasan] Add definitions for missing operator delete functions"
Leonard Chan via llvm-commits
- [compiler-rt] 22b7685 - Reland "[hwasan] Add definitions for missing operator delete functions"
Leonard Chan via llvm-commits
- [PATCH] D144035: [hwasan] Ensure hwasan aliases do not have ODR linkage
Leonard Chan via Phabricator via llvm-commits
- [PATCH] D144035: [hwasan] Ensure hwasan aliases do not have ODR linkage
Leonard Chan via Phabricator via llvm-commits
- [PATCH] D143226: [MC][CodeGen] Define R_RISCV_PLT32 and lower dso_local_equivalent to it
Leonard Chan via Phabricator via llvm-commits
- [PATCH] D143646: [RISCV] Return false from shouldFormOverflowOp
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `force-lower-gep`
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143542: [SeparateConstOffsetFromGEP] Fix: `b - a` matched `a - b` during reuniteExts
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143542: [SeparateConstOffsetFromGEP] Fix: `b - a` matched `a - b` during reuniteExts
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143542: [SeparateConstOffsetFromGEP] Fix: `b - a` matched `a - b` during reuniteExts
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143542: [SeparateConstOffsetFromGEP] Fix: `b - a` matched `a - b` during reuniteExts
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143542: [SeparateConstOffsetFromGEP] Fix: `b - a` matched `a - b` during reuniteExts
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D144365: [NFC] Use single quotes for single char output during `printPipline`
Liren.Peng via Phabricator via llvm-commits
- [PATCH] D143723: [RISCV] Increase default vectorizer LMUL to 2
Lorenzo Albano via Phabricator via llvm-commits
- [PATCH] D143846: [LoongArch] Add baseline tests for `addu16i.d` codegen. NFC
Lu Weining via Phabricator via llvm-commits
- [PATCH] D143710: [LoongArch] Make use of addu16i.d for adds with suitable immediates
Lu Weining via Phabricator via llvm-commits
- [PATCH] D141785: [Clang][LoongArch] Implement patchable function entry
Lu Weining via Phabricator via llvm-commits
- [PATCH] D143880: [LoongArch] Emit bytepick for picking from concatenation of two values
Lu Weining via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144091: [RISCV][NFC] Add VIOTA_VL node
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Luke Lau via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144175: [RISCV] Combine (store/load interleave, deinterleave) into vsseg2/vlseg2
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144143: [RISCV] Improve isInterleaveShuffle to handle interleaving the high half and low half of the same source.
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144091: [RISCV][NFC] Add VIOTA_VL node
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144175: [RISCV] Combine (store/load interleave, deinterleave) into vsseg2/vlseg2
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144175: [RISCV] Combine (store/load interleave, deinterleave) into vsseg2/vlseg2
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Luke Lau via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Luke Lau via Phabricator via llvm-commits
- [PATCH] D143872: [X86][FP16] Combine two steps conversions into direct conversion
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D144163: [X86] Support load/store for bf16 vector in avx
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D144163: [X86] Support load/store for bf16 vector in avx
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D143345: [RFC][RISCV] Don't disassemble `addi`s with relocations as `mv`s
Luís Marques via Phabricator via llvm-commits
- [PATCH] D143345: [RFC][RISCV] Don't disassemble `addi`s with relocations as `mv`s
Luís Marques via Phabricator via llvm-commits
- [PATCH] D143345: [RFC][RISCV] Don't disassemble `addi`s with relocations as `mv`s
Luís Marques via Phabricator via llvm-commits
- [PATCH] D144174: [Support][RISCV] Disable use of backtrace() for RISC-V backtraces
Luís Marques via Phabricator via llvm-commits
- [PATCH] D144174: [Support][RISCV] Disable use of backtrace() for RISC-V backtraces
Luís Marques via Phabricator via llvm-commits
- [PATCH] D144178: [CMake] Enforce LLVM_ENABLE_UNWIND_TABLES
Luís Marques via Phabricator via llvm-commits
- [PATCH] D144166: [RISCV] For rv32, accept constants like 0xfffff800 as a valid simm12.
Luís Marques via Phabricator via llvm-commits
- [PATCH] D144166: [RISCV] For rv32, accept constants like 0xfffff800 as a valid simm12.
Luís Marques via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Mahesh Ravishankar via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Mahesh Ravishankar via Phabricator via llvm-commits
- [llvm] f79a5fb - [Test][SCEV] Add a test where the trip count can't be calculated
Maksim Kazantsev via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144249: [RISCV] Add vendor-defined XTheadMemIdx (Indexed Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Manolis Tsamis via Phabricator via llvm-commits
- [PATCH] D143593: [InstCombine] Don't fold freeze poison when it's used in shufflevector
Manuel Brito via Phabricator via llvm-commits
- [PATCH] D143593: [InstCombine] Don't fold freeze poison when it's used in shufflevector
Manuel Brito via Phabricator via llvm-commits
- [PATCH] D143593: [InstCombine] Don't fold freeze poison when it's used in shufflevector
Manuel Brito via Phabricator via llvm-commits
- [llvm] d464edd - [X86][Win64] Avoid statepoints prior to SEH epilogue
Markus Böck via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Markus Böck via Phabricator via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Markus Böck via Phabricator via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Markus Böck via Phabricator via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Markus Böck via Phabricator via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Markus Böck via Phabricator via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Markus Böck via Phabricator via llvm-commits
- [PATCH] D143812: [X86][Win64] Avoid statepoints prior to SEH epilogue
Markus Böck via Phabricator via llvm-commits
- [lld] 389bfbd - [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Martin Storsjö via llvm-commits
- [llvm] a1e80c6 - [Support] [Windows] Don't check file access time in equivalent(file_status, file_status)
Martin Storsjö via llvm-commits
- [lld] eb14186 - Revert "[LLD] [COFF] Don't try to detect MSVC installations in mingw mode"
Martin Storsjö via llvm-commits
- [PATCH] D143981: [Support/BLAKE3] Rename blake3_* -> llvm_blake3_* to avoid symbol collisions
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144049: [Symbolize][MinGW] Support demangling i386 call-conv-decorated C++ names
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D143812: [X86][Win64] Avoid statepoints prior to SEH epilogue
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144049: [Symbolize][MinGW] Support demangling i386 call-conv-decorated C++ names
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144084: [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144049: [Symbolize][MinGW] Support demangling i386 call-conv-decorated C++ names
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144049: [Symbolize][MinGW] Support demangling i386 call-conv-decorated C++ names
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144084: [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144084: [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144084: [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144084: [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144172: [Support] [Windows] Don't check file access time in equivalent(file_status, file_status)
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144172: [Support] [Windows] Don't check file access time in equivalent(file_status, file_status)
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144172: [Support] [Windows] Don't check file access time in equivalent(file_status, file_status)
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144084: [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144172: [Support] [Windows] Don't check file access time in equivalent(file_status, file_status)
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144172: [Support] [Windows] Don't check file access time in equivalent(file_status, file_status)
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144084: [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144172: [Support] [Windows] Don't check file access time in equivalent(file_status, file_status)
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D144084: [LLD] [COFF] Don't try to detect MSVC installations in mingw mode
Mateusz Mikuła via Phabricator via llvm-commits
- [llvm] 463ab1e - llvm-reduce: Run instruction reduction last
Matt Arsenault via llvm-commits
- [llvm] 0a669bd - AMDGPU: Add additional tests for combiner infinite loop
Matt Arsenault via llvm-commits
- [llvm] ce4b719 - AMDGPU: Add test for getNegatedExpression with rcp
Matt Arsenault via llvm-commits
- [llvm] 4f0eb57 - AMDGPU: Teach getNegatedExpression about rcp
Matt Arsenault via llvm-commits
- [llvm] f3c008c - DAG: Relax foldBitcastedFPLogic conditions
Matt Arsenault via llvm-commits
- [llvm] 09dd4d8 - DAG: Remove hasBitPreservingFPLogic
Matt Arsenault via llvm-commits
- [llvm] df78976 - InstCombine: Fold is.fpclass(x, fcZero) to fcmp oeq 0
Matt Arsenault via llvm-commits
- [llvm] a4e8347 - AMDGPU: Refactor isConstantCostlierToNegate
Matt Arsenault via llvm-commits
- [llvm] 11c3cea - AMDGPU: Override getNegatedExpression constant handling
Matt Arsenault via llvm-commits
- [llvm] 458ad69 - Revert "InstCombine: Fold is.fpclass(x, fcZero) to fcmp oeq 0"
Matt Arsenault via llvm-commits
- [llvm] 9ccc588 - AMDGPU: Fix not adding to depth in getNegatedExpression
Matt Arsenault via llvm-commits
- [llvm] 25a4610 - OpenMP: Regenerate test checks
Matt Arsenault via llvm-commits
- [llvm] e844407 - CodeExtractor: Fix creating addrspacecasts for lifetime markers
Matt Arsenault via llvm-commits
- [llvm] c42eda5 - IROutliner: cast instead of dyn_cast and assert
Matt Arsenault via llvm-commits
- [llvm] 28d8889 - AMDGPU: Teach fneg combines that select has source modifiers
Matt Arsenault via llvm-commits
- [llvm] c177051 - AMDGPU: Restrict foldFreeOpFromSelect combine based on legal source mods
Matt Arsenault via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143886: [DAG] Handle build_vector with all undefs in reduceBuildVecTruncToBitCast
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142461: [SPARC] Lower BR_CC to BPr on 64-bit target whenever possible
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142458: [SPARC] Implement hooks for conditional branch relaxation
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143934: [AMDGPU] Do not apply schedule metric for regions with spilling
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143941: AMDGPU: Teach getNegatedExpression about rcp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143945: [AMDGPU] Add legalization case for PTR_ADD on buffer pointers
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143963: AMDGPU: Override getNegatedExpression constant handling
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143945: [AMDGPU] Add legalization case for PTR_ADD on buffer pointers
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143731: [AMDGPU] Break-up large PHIs for DAGISel
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143731: [AMDGPU] Break-up large PHIs for DAGISel
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142424: DAG: Relax foldBitcastedFPLogic conditions
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143731: [AMDGPU] Break-up large PHIs for DAGISel
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142567: DAG: Remove hasBitPreservingFPLogic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144040: [NFC][IR] Force accesses to Function attributes go through getters/setters
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143515: [AsmPrinter] Add hook to override constant folding for printing.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144056: precommit test case
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142418: AMDGPU: Teach fneg combines that select has source modifiers
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143279: InstCombine: Handle folding fcmp of 0 into llvm.is.fpclass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143963: AMDGPU: Override getNegatedExpression constant handling
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143941: AMDGPU: Teach getNegatedExpression about rcp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143279: InstCombine: Handle folding fcmp of 0 into llvm.is.fpclass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144081: InstCombine: Fold and/or of fcmp into class
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143941: AMDGPU: Teach getNegatedExpression about rcp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144070: [llvm][GenericUniformity] Prevent assert while calculating temporal divergence
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143180: DAG: Expand legalization of is.fpclass to fcmp for DAZ
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143264: InstCombine: Fold is.fpclass(x, fcZero) to fcmp oeq 0
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143182: CodeGen: Optimize lowering of is.fpclass fcZero|fcSubnormal
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143195: ValueTracking: Add start of computeKnownFPClass API
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D139902: IR: Add nofpclass parameter attribute
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143195: ValueTracking: Add start of computeKnownFPClass API
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144099: [WIP][AMDGPU] Fold more AGPR copies/PHIs in SIFoldOperands
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D141072: [NVPTX] Work around syntax error in PTX assembly
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144198: [AMDGPU] Check exact width in get*ClassForBitWidth
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142907: LangRef: Add "dynamic" option to "denormal-fp-math"
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144070: [llvm][GenericUniformity] Prevent assert while calculating temporal divergence
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142907: LangRef: Add "dynamic" option to "denormal-fp-math"
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143437: [llvm] Use pointer index type for more GEP offsets (pre-codegen)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144221: [amdgpu][nfc] Replace ad hoc LDS frame recalculation with absolute_symbol MD
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144070: [llvm][GenericUniformity] Prevent assert while calculating temporal divergence
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144241: [NFC] Make FPClassTest a bitmask enumeration
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144250: [AMDGPU] Simplify widenScalar condition for BigTy for G_(UN)MERGE_VALUES
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144202: [ADT] Alternative way to declare enum type as bitmask
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144250: [AMDGPU] Simplify widenScalar condition for BigTy for G_(UN)MERGE_VALUES
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D141066: CodeExtractor: Fix creating addrspacecasts for lifetime markers
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144265: DAG: Handle lowering unordered compare with inf
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144268: DAG: Improve lowering of fcPosInf|fcNan or fcNegInf|fcNan
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D139455: AMDGPU: Document denormal behavior
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142907: LangRef: Add "dynamic" option to "denormal-fp-math"
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142907: LangRef: Add "dynamic" option to "denormal-fp-math"
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D144303: [GlobalISel] Combine out-of-range shifts to undef
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D141066: CodeExtractor: Fix creating addrspacecasts for lifetime markers
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142418: AMDGPU: Teach fneg combines that select has source modifiers
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142419: AMDGPU: Restrict a select combine based on legal source mods
Matt Arsenault via Phabricator via llvm-commits
- [llvm] d64d577 - Add InstSimplify tests for comparisons between known constants
Matt Devereau via llvm-commits
- [PATCH] D142542: [InstSimplify] Simplify icmp between Shl instructions of the same value
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D142542: [InstSimplify] Simplify icmp between Shl instructions of the same value
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D142542: [InstSimplify] Simplify icmp between Shl instructions of the same value
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D142542: [InstSimplify] Simplify icmp between Shl instructions of the same value
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D141650: [VectorUtils] Enhance VFABI demangling API
Matt via Phabricator via llvm-commits
- [PATCH] D143852: [docs] Add Python coding standard to documentation
Matthias Braun via Phabricator via llvm-commits
- [PATCH] D143754: [MachineInstr] Introduce generic predicated copy opcode
Matthias Braun via Phabricator via llvm-commits
- [PATCH] D143754: [MachineInstr] Introduce generic predicated copy opcode
Matthias Braun via Phabricator via llvm-commits
- [llvm] cfeb0bf - [SimpleLoopUnswitch] Temorarily switch off simple-loop-unswitch-inject-invariant-conditions. PR60736
Max Kazantsev via llvm-commits
- [llvm] ebc21c7 - [Test] Add test for PR60736
Max Kazantsev via llvm-commits
- [llvm] 3849dc1 - [NFC] Move some asserts out of Expensive Checks
Max Kazantsev via llvm-commits
- [llvm] c7ea20c - [SimpleLoopUnswitch] Ignore inner loops when injecting invariant conditions. PR60736
Max Kazantsev via llvm-commits
- [llvm] 6722352 - [SimpleLoopUnswitch] Re-enable simple-loop-unswitch-inject-invariant-conditions
Max Kazantsev via llvm-commits
- [llvm] 86a63b2 - [Metarenamer] Use 'inst' as default name for instructions
Max Kazantsev via llvm-commits
- [llvm] bc173f5 - [SimpleLoopUnswitch] Fix overflowing frequencies case
Max Kazantsev via llvm-commits
- [llvm] 0992e6e - [Test][NFC] Rename one of test parameters to avoid confusing associations
Max Kazantsev via llvm-commits
- [llvm] 3600b38 - [SimpleLoopUnswitch] Canonicalize conditions for injection of invariant condition
Max Kazantsev via llvm-commits
- [llvm] df9c5bd - [SCEV] Support umin/smin in SCEVLoopGuardRewriter
Max Kazantsev via llvm-commits
- [PATCH] D144001: [Metarenamer] Use 'val' as default name for instructions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D144001: [Metarenamer] Use 'val' as default name for instructions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D144001: [Metarenamer] Use 'inst' as default name for instructions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D144050: [SCEV] Strengthen nowrap flags via ranges for ARs on construction.
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D144001: [Metarenamer] Use 'inst' as default name for instructions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D144001: [Metarenamer] Use 'inst' as default name for instructions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D143175: [SimpleLoopUnswitch] Canonicalize conditions for injection of invariant condition
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D143175: [SimpleLoopUnswitch] Canonicalize conditions for injection of invariant condition
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D138015: [SimpleLoopUnswtich] Support zext when injecting invariant conditions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D142330: [AssumptionCache] caches @llvm.experimental.guard's
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D144050: [SCEV] Strengthen nowrap flags via ranges for ARs on construction.
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D143259: [SCEV] Support umin/smin in SCEVLoopGuardRewriter
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D143409: [SCEV][IndVarSimplify] Add nsw/nuw falgs to binary ops before visiting IVUsers
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D142705: [GVN] Support address translation through select instructions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D144361: [SimpleLoopUnswitch] Fix an assert in injectPendingInvariantConditions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D144089: [IndVarSimplify] Transform the trip count into a simpler form
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D141481: [SCEV] Canonicalize ext(min/max(x, y)) to min/max(ext(x), ext(y))
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D143892: [CodeGenPrepare] Don't give up if unable to sink first arg to a cold call
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D143893: [CodeGenPrepare] Fix counting uses when folding addresses into memory instructions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D143700: llvm: add C API methods to match 64bit ArrayType C++ API signatures
Meghan via Phabricator via llvm-commits
- [PATCH] D143468: [CMake] Remove custom ccache CMake logic
Mehdi AMINI via Phabricator via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Mehdi AMINI via Phabricator via llvm-commits
- [PATCH] D140806: Change getProcessTriple to return different archs in universal binary
Mehdi AMINI via Phabricator via llvm-commits
- [PATCH] D143925: [mlir] Make the vast majority of integration and runner tests work on Windows
Mehdi AMINI via Phabricator via llvm-commits
- [PATCH] D143465: [LoopVectorize] Vectorize the reduction pattern of integer min/max with index. (WIP)
Mel Chen via Phabricator via llvm-commits
- [PATCH] D143905: [LV] Harden the test of the minmax with index pattern. (NFC)
Mel Chen via Phabricator via llvm-commits
- [PATCH] D143465: [LoopVectorize] Vectorize the reduction pattern of integer min/max with index. (WIP)
Mel Chen via Phabricator via llvm-commits
- [PATCH] D143377: [SingleSource/Vectorizer] Move helper functions & macros to header.
Mel Chen via Phabricator via llvm-commits
- [PATCH] D143465: [LoopVectorize] Vectorize the reduction pattern of integer min/max with index. (WIP)
Mel Chen via Phabricator via llvm-commits
- [PATCH] D143465: [LoopVectorize] Vectorize the reduction pattern of integer min/max with index. (WIP)
Mel Chen via Phabricator via llvm-commits
- [PATCH] D143465: [LoopVectorize] Vectorize the reduction pattern of integer min/max with index. (WIP)
Mel Chen via Phabricator via llvm-commits
- [PATCH] D143465: [LoopVectorize] Vectorize the reduction pattern of integer min/max with index.
Mel Chen via Phabricator via llvm-commits
- [PATCH] D144180: [llvm][DebugInfo] Add Annotations parameter to DIBuilder::createMethod
Michael Buch via Phabricator via llvm-commits
- [PATCH] D144140: [libc][bazel] add string to float targets
Michael Jones via Phabricator via llvm-commits
- [PATCH] D144140: [libc][bazel] add string to float targets
Michael Jones via Phabricator via llvm-commits
- [PATCH] D144123: [LV] Add setStartValue to VPWidenIntOrFPInductionRecipe
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D144125: [VPlan] Improve VPRecipeBase::isPhi checking
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D144125: [VPlan] Improve VPRecipeBase::isPhi checking
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D144125: [VPlan] Improve VPRecipeBase::isPhi checking
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D144125: [VPlan] Improve VPRecipeBase::isPhi checking
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D144125: [VPlan] Improve VPRecipeBase::isPhi checking
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D144125: [VPlan] Improve VPRecipeBase::isPhi checking
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D144125: [VPlan] Improve VPRecipeBase::isPhi checking
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D143107: [SPIR-V] Emit spv_undef intrinsic for aggregate undef operands
Michal Paszkowski via Phabricator via llvm-commits
- [PATCH] D143107: [SPIR-V] Emit spv_undef intrinsic for aggregate undef operands
Michal Paszkowski via Phabricator via llvm-commits
- [PATCH] D143316: [m68k] Implement absolution long addressing mode for ADDA instruction
Min-Yih Hsu via Phabricator via llvm-commits
- [PATCH] D143315: [m68k] Implement BSR Instruction
Min-Yih Hsu via Phabricator via llvm-commits
- [PATCH] D144189: [AIX][CodeGen] Storage Locations for Constant Pointers
Min-Yih Hsu via Phabricator via llvm-commits
- [PATCH] D143225: [SROA] Create additional vector type candidates based on store and load slices
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D143225: [SROA] Create additional vector type candidates based on store and load slices
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D144209: [ThinLTO/WPD] Handle function alias in vtable correctly
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D144270: [LTO/WPD] Allow devirtualization to function alias in vtable
Mingming Liu via Phabricator via llvm-commits
- [llvm] 8cf1524 - [loop unroll] Fix `branch-weights` for unrolled loop.
Mircea Trofin via llvm-commits
- [PATCH] D143948: [loop unroll] Fix `branch-weights` for unrolled loop.
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D143948: [loop unroll] Fix `branch-weights` for unrolled loop.
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D143948: [loop unroll] Fix `branch-weights` for unrolled loop.
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D143948: [loop unroll] Fix `branch-weights` for unrolled loop.
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D144033: [AMDGPU][MC][GFX11] Add partial NSA format for image sample instructions
Mirko Brkusanin via Phabricator via llvm-commits
- [PATCH] D144034: [AMDGPU][GFX11] Legalize and select partial NSA MIMG instructions
Mirko Brkusanin via Phabricator via llvm-commits
- [PATCH] D144033: [AMDGPU][MC][GFX11] Add partial NSA format for image sample instructions
Mirko Brkusanin via Phabricator via llvm-commits
- [PATCH] D144033: [AMDGPU][MC][GFX11] Add partial NSA format for image sample instructions
Mirko Brkusanin via Phabricator via llvm-commits
- [PATCH] D144034: [AMDGPU][GFX11] Legalize and select partial NSA MIMG instructions
Mirko Brkusanin via Phabricator via llvm-commits
- [PATCH] D143157: [AArch64] Add NZCV Def for TLSDESC_CALLSEQ
Mirko Müller via Phabricator via llvm-commits
- [PATCH] D143157: [AArch64] Add NZCV Def for TLSDESC_CALLSEQ
Mirko Müller via Phabricator via llvm-commits
- [PATCH] D143693: [llvm-readobj] Add --memtag
Mitch Phillips via Phabricator via llvm-commits
- [PATCH] D143769: [lld] [MTE] Add DT_AARCH64_MEMTAG_* dynamic entries, and small cleanup
Mitch Phillips via Phabricator via llvm-commits
- [PATCH] D143769: [lld] [MTE] Add DT_AARCH64_MEMTAG_* dynamic entries, and small cleanup
Mitch Phillips via Phabricator via llvm-commits
- [PATCH] D143693: [llvm-readobj] Add --memtag
Mitch Phillips via Phabricator via llvm-commits
- [PATCH] D143693: [llvm-readobj] Add --memtag
Mitch Phillips via Phabricator via llvm-commits
- [PATCH] D143769: [lld] [MTE] Add DT_AARCH64_MEMTAG_* dynamic entries, and small cleanup
Mitch Phillips via Phabricator via llvm-commits
- [PATCH] D143693: [llvm-readobj] Add --memtag
Mitch Phillips via Phabricator via llvm-commits
- [PATCH] D143892: [CodeGenPrepare] Don't give up if unable to sink first arg to a cold call
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D143893: [CodeGenPrepare] Fix counting uses when folding addresses into memory instructions
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D143894: [CodeGenPrepare] Increase the limit on the number of instructions to scan
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D143895: [AArch64] Fix incorrect `isLegalAddressingMode`
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D143896: [NFC][CodeGenPrepare] Match against the correct instruction when checking profitability of folding an address
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D143897: [CodeGenPrepare] Loop invariant liveness
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D143898: [CodeGenPrepare] Fold addressing mode into calls
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D143898: [CodeGenPrepare] Fold addressing mode into calls
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
Moshe via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
Moshe via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
Moshe via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
Moshe via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
Moshe via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
Moshe via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
Moshe via Phabricator via llvm-commits
- [PATCH] D143508: [ELF][llvm-objcopy] Reject duplicate SHT_SYMTAB sections.
Moshe via Phabricator via llvm-commits
- [llvm] c5e1000 - Add build for Windows on Arm in packaging script
Muhammad Omair Javaid via llvm-commits
- [PATCH] D142983: Add build for Windows on Arm in packaging script
Muhammad Omair Javaid via Phabricator via llvm-commits
- [llvm] afde3f5 - llvm-tblgen: Apply IWYU partially
NAKAMURA Takumi via llvm-commits
- [llvm] 655f4cb - llvm-tblgen: Reformat
NAKAMURA Takumi via llvm-commits
- [llvm] b3405ac - llvm-tblgen: Add missing includes
NAKAMURA Takumi via llvm-commits
- [llvm] aeafcbc - llvm-tblgen: Add "TableGenBackends.h" to each emitter.
NAKAMURA Takumi via llvm-commits
- [llvm] c45e90c - llvm-tblgen: Anonymize some functions.
NAKAMURA Takumi via llvm-commits
- [PATCH] D143844: llvm-tblgen: Split out CodeGenIntrinsics.cpp from CodeGenTarget.cpp
NAKAMURA Takumi via Phabricator via llvm-commits
- [PATCH] D144351: llvm-tblgen: Let each emitter self-contained
NAKAMURA Takumi via Phabricator via llvm-commits
- [PATCH] D144351: llvm-tblgen: Let each emitter self-contained
NAKAMURA Takumi via Phabricator via llvm-commits
- [PATCH] D143038: [AArch64] Added tests for inserting scalar result of uaddlv neon instrinsic function into a vector
NILANJANA BASU via Phabricator via llvm-commits
- [PATCH] D143725: [llvm-objdump][ARM] support --symbolize-operands for ARM/ELF
Nam Cao via Phabricator via llvm-commits
- [PATCH] D143961: [llvm][SelectionDAGBuilder] use getRegistersForValue to generate legal copies
Nathan Chancellor via Phabricator via llvm-commits
- [llvm] 56e41fc - [PowerPC] Bail out of FISel when lowering long calls
Nemanja Ivanovic via llvm-commits
- [PATCH] D137599: [libunwind][PowerPC] Fix saving/restoring VSX registers on LE systems
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D123997: [PowerPC] Bail out of FISel when lowering long calls
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D141673: [PowerPC][NFC] refactor eligible check for tail call optimization
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D144321: [PowerPC] Correctly use ELFv2 ABI on all OS's that use the ELFv2 ABI
Nemanja Ivanovic via Phabricator via llvm-commits
- [llvm] c062e97 - [llvm][test] restrict 2 GVN tests to just test GVN (NFC)
Nick Desaulniers via llvm-commits
- [llvm] 9e9293e - [llvm][test] convert one test to use opaque ptrs (NFC)
Nick Desaulniers via llvm-commits
- [llvm] 45a291b - [Dominators] check indirect branches of callbr
Nick Desaulniers via llvm-commits
- [llvm] fb47115 - [llvm] boilerplate for new callbrprepare codegen IR pass
Nick Desaulniers via llvm-commits
- [llvm] 0a39af0 - [llvm][CallBrPrepare] split critical edges
Nick Desaulniers via llvm-commits
- [llvm] 094190c - [llvm][CallBrPrepare] add llvm.callbr.landingpad intrinsic
Nick Desaulniers via llvm-commits
- [llvm] 28d45c8 - [llvm][CallBrPrepare] use SSAUpdater to use intrinsic value
Nick Desaulniers via llvm-commits
- [llvm] 5cc1016 - [llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic
Nick Desaulniers via llvm-commits
- [llvm] a3a84c9 - [llvm] add CallBrPrepare pass to pipelines
Nick Desaulniers via llvm-commits
- [llvm] 39811e2 - [llvm][test] enable/disable -verify-machineinstrs where possible for callbr
Nick Desaulniers via llvm-commits
- [llvm] cf86855 - [M68k] fix test regression introduced by D140180
Nick Desaulniers via llvm-commits
- [PATCH] D140160: [llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D143440: [SelectionDAGBuilder] handle Flag Output Operands in callbr
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D143961: [llvm][SelectionDAGBuilder] use getRegistersForValue to generate legal copies
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D143440: [SelectionDAGBuilder] handle Flag Output Operands in callbr
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D140160: [llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D144023: [llvm][test] restrict 2 GVN tests to just test GVN (NFC)
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D144023: [llvm][test] restrict 2 GVN tests to just test GVN (NFC)
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D143681: [llvm][test] restrict 2 GVN tests to just test GVN (NFC)
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D143961: [llvm][SelectionDAGBuilder] use getRegistersForValue to generate legal copies
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D143961: [llvm][SelectionDAGBuilder] use getRegistersForValue to generate legal copies
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D143961: [llvm][SelectionDAGBuilder] use getRegistersForValue to generate legal copies
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D143681: [llvm][test] restrict 2 GVN tests to just test GVN (NFC)
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D143682: [llvm][test] convert one test to use opaque ptrs (NFC)
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D137707: Move "auto-init" instructions to the dominator of their users
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D144056: precommit test case
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D144057: [GVN] permit GVN for ASAN unless undef is produced
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D144057: [GVN] permit GVN for ASAN unless undef is produced
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D144057: [GVN] permit GVN of non-local loads for ASAN unless undef is produced
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D144057: [GVN] permit GVN of non-local loads for ASAN unless undef is produced
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D144056: precommit test case
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D144057: [GVN] permit GVN of non-local loads for ASAN unless undef is produced
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D144057: [GVN] permit GVN of non-local loads for ASAN unless undef or alloca is produced
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D135997: [Dominators] check indirect branches of callbr
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D140166: [IR] return nullptr in Instruction::getInsertionPointAfterDef for CallBrInst
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D139861: [llvm] boilerplate for new callbrprepare codegen IR pass
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D139872: [llvm][CallBrPrepare] split critical edges
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D139883: [llvm][CallBrPrepare] add llvm.callbr.landingpad intrinsic
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D139970: [llvm][CallBrPrepare] use SSAUpdater to use intrinsic value
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D140160: [llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D140180: [llvm] add CallBrPrepare pass to pipelines
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D142940: [llvm][SelectionDAGBuilder] change callbr.landingpad intrinsic to accept explicit param
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D143961: [llvm][SelectionDAGBuilder] use getRegistersForValue to generate legal copies
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D135997: [Dominators] check indirect branches of callbr
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D139861: [llvm] boilerplate for new callbrprepare codegen IR pass
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D139872: [llvm][CallBrPrepare] split critical edges
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D139883: [llvm][CallBrPrepare] add llvm.callbr.landingpad intrinsic
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D139970: [llvm][CallBrPrepare] use SSAUpdater to use intrinsic value
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D140160: [llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D140180: [llvm] add CallBrPrepare pass to pipelines
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D140160: [llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D140180: [llvm] add CallBrPrepare pass to pipelines
Nick Desaulniers via Phabricator via llvm-commits
- [llvm] 5d3c588 - [gn] port c4f7cc867299 (CoroTests)
Nico Weber via llvm-commits
- [llvm] 361d5a7 - [gn] port 4e3dac6f0a4c (ScudoHooksUnitTest)
Nico Weber via llvm-commits
- [llvm] b40bfc1 - Reland "[gn] port f29cfab55d1f"
Nico Weber via llvm-commits
- [PATCH] D143945: [AMDGPU] Add legalization case for PTR_ADD on buffer pointers
Nicolai Hähnle via Phabricator via llvm-commits
- [PATCH] D143522: [AMDGPU] Set a data layout entry for buffer descriptors (addrspace 7)
Nicolai Hähnle via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Nicolas Vasilache via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Nicolas Vasilache via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Nicolas Vasilache via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Nicolas Vasilache via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Nicolas Vasilache via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Nicolas Vasilache via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Nicolas Vasilache via Phabricator via llvm-commits
- [PATCH] D144260: [mlir][linalg][TransformOps] Connect hoistRedundantVectorTransfers
Nicolas Vasilache via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Nicolas Vasilache via Phabricator via llvm-commits
- [llvm] 4c8eda9 - [XCore] Adapt threads.ll to opaque pointers.
Nigel Perks via llvm-commits
- [PATCH] D144085: Adapt threads.ll to opaque pointers.
Nigel Perks via Phabricator via llvm-commits
- [PATCH] D144085: [XCore] Adapt threads.ll to opaque pointers.
Nigel Perks via Phabricator via llvm-commits
- [PATCH] D144085: [XCore] Adapt threads.ll to opaque pointers.
Nigel Perks via Phabricator via llvm-commits
- [llvm] 2e9549d - [LangRef] Global variable declarations imply minimum size
Nikita Popov via llvm-commits
- [llvm] bfbfbd8 - [LVI] Fix and re-enable at-use reasoning (PR60629)
Nikita Popov via llvm-commits
- [llvm] 35276f1 - [llvm-c] Add C API methods to match 64bit ArrayType C++ API signatures
Nikita Popov via llvm-commits
- [llvm] 14fcdd7 - [CVP] Add additional ctlz tests (NFC)
Nikita Popov via llvm-commits
- [llvm] 07916ce - [ConstantFold] Check for constant global earlier (NFC)
Nikita Popov via llvm-commits
- [llvm] 22882c3 - [InstSimplify] Add additional insertvalue into undef tests (NFC)
Nikita Popov via llvm-commits
- [llvm] 02ae7e7 - Revert "Recommit "[ConstraintElimination] Change debug output to display variable names.""
Nikita Popov via llvm-commits
- [llvm] 9ca2c30 - [InstSimplify] Fix poison safety in insertvalue fold
Nikita Popov via llvm-commits
- [llvm] 6bec2c3 - [InstCombine] Add additional aggregate reconstruction test (NFC)
Nikita Popov via llvm-commits
- [llvm] c9fad20 - [InstCombine] Call simplifyInsertValueInst()
Nikita Popov via llvm-commits
- [llvm] eeb1256 - [InstSimplify] Slightly optimize simplifyLoad() (NFC)
Nikita Popov via llvm-commits
- [llvm] 4565bc0 - [DataLayout] Use separate vectors to store alignment (NFC)
Nikita Popov via llvm-commits
- [llvm] 65898e5 - [ConstantRange] Handle `Intrinsic::ctlz`
Nikita Popov via llvm-commits
- [PATCH] D143057: [LangRef] Global variable declarations imply minimum size
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143542: [SeparateConstOffsetFromGEP] Fix: `b - a` matched `a - b` during reuniteExts
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `force-lower-gep`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143641: [MemorySSA] Iteratively check if gep's pointer operand is a guaranteed loop invariant
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143700: llvm: add C API methods to match 64bit ArrayType C++ API signatures
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143700: llvm: add C API methods to match 64bit ArrayType C++ API signatures
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143129: [GVN] Do not propagate equalities for noalias pointers
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143515: [AsmPrinter] Add hook to override constant folding for printing.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143409: [SCEV][IndVarSimplify] Add nsw/nuw falgs to binary ops before visiting IVUsers
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143681: [llvm][test] restrict 2 GVN tests to just test GVN (NFC)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143682: [llvm][test] convert one test to use opaque ptrs (NFC)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D136861: [IR] Add LLVM IR support for target("aarch64.svcount") type.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142473: [UTC] Add --version argument
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143948: [loop unroll] Fix `branch-weights` for unrolled loop.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143954: [ValueTracking] It is not safe to execute FDIV/FREM speculatively
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143892: [CodeGenPrepare] Don't give up if unable to sink first arg to a cold call
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143980: [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143409: [SCEV][IndVarSimplify] Add nsw/nuw falgs to binary ops before visiting IVUsers
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144001: [Metarenamer] Use 'val' as default name for instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144001: [Metarenamer] Use 'val' as default name for instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143681: [llvm][test] restrict 2 GVN tests to just test GVN (NFC)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144040: [NFC][IR] Force accesses to Function attributes go through getters/setters
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143766: [InstCombine] Fix InstCombinerImpl::foldICmpMulConstant for nsw and nuw mul with unsigned compare.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143726: [LoopInstSimplify] Simplify (X < A && X < B) into (X < MIN(A, B)) if MIN(A, B) is loop-invariant
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144045: [InstCombine] avoid sinking fdiv into a loop
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144001: [Metarenamer] Use 'inst' as default name for instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144057: [GVN] permit GVN of non-local loads for ASAN unless undef is produced
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142542: [InstSimplify] Simplify icmp between Shl instructions of the same value
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144053: [LICM] Ensure LICM can hoist invariant.group
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143700: llvm: add C API methods to match 64bit ArrayType C++ API signatures
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142234: [ConstantRange] Handle Intrinsic::ctlz
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144085: [XCore] Adapt threads.ll to opaque pointers.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142234: [ConstantRange] Handle Intrinsic::ctlz
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144040: [NFC][IR] Force accesses to Function attributes go through getters/setters
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142234: [ConstantRange] Handle `Intrinsic::ctlz`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144082: [llvm][AArch64] Fix BTI after returns_twice when call has no attributes
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142542: [InstSimplify] Simplify icmp between Shl instructions of the same value
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144106: [InstSimplify] Fix poison safety in insertvalue fold
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142330: [AssumptionCache] caches @llvm.experimental.guard's
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144053: [LICM] Ensure LICM can hoist invariant.group
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144106: [InstSimplify] Fix poison safety in insertvalue fold
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142234: [ConstantRange] Handle `Intrinsic::ctlz`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142234: [ConstantRange] Handle `Intrinsic::ctlz`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144184: [InstSimplify] fold LoadInst for uniformaly initialized constant global variables
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144199: [InstCombine] create and use a pass options container
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142234: [ConstantRange] Handle `Intrinsic::ctlz`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144199: [InstCombine] create and use a pass options container
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144184: [InstSimplify] fold LoadInst for uniformaly initialized constant global variables
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144050: [SCEV] Strengthen nowrap flags via ranges for ARs on construction.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144274: [InstCombine] use loop info when running the pass after loop vectorization
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144184: [InstSimplify] fold LoadInst for uniformaly initialized constant global variables
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144329: [InstCombine] canonicalize "extract lowest set bit" away from cttz intrinsic
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142271: [ValueTracking] Add KnownBits patterns `xor(x, x - 1)` and `and(x, -x)` for knowing upper bits to be zero
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144050: [SCEV] Strengthen nowrap flags via ranges for ARs on construction.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142849: [ValueTracking] Add helper for handling `computeKnownBits` for and/xor/or; NFC
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144332: [Polly] Remove CodegenCleanupPass.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D142849: [ValueTracking] Add helper for handling `computeKnownBits` for and/xor/or; NFC
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144333: [DivRemPairs] Strip division's poison generating flag
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144316: [SCEV] Fix FoldID::addInteger(unsigned long I)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144343: [ConstantRange][SCEV] print unsigned ranges
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144319: [SimplifyCFG] Check if the return instruction causes undefined behavior
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D141481: [SCEV] Canonicalize ext(min/max(x, y)) to min/max(ext(x), ext(y))
Nikita Popov via Phabricator via llvm-commits
- [llvm] f3732c2 - Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via llvm-commits
- [llvm] e29c439 - Add tests for folding `(and/or (icmp eq/ne A, Pow2), (icmp eq/ne A, -Pow2))`; NFC
Noah Goldstein via llvm-commits
- [llvm] 54a9e99 - Add Transform for `(and/or (eq/ne A,Pow2),(eq/ne A,-Pow2))`->`(eq/ne (and (and A,Pow2),~(Pow2*2)), 0)`
Noah Goldstein via llvm-commits
- [llvm] 8b5c390 - Transform `(icmp eq/ne Abs(A), Pow2)` -> `(and/or (icmp eq/ne A,Pow2), (icmp eq/ne A,-Pow2))`
Noah Goldstein via llvm-commits
- [llvm] abf6692 - Tests for (and/or (icmp eq/ne A, C), (icmp eq/ne A, -C)) <--> (icmp eq/ne (ABS A), ABS(C)); NFC
Noah Goldstein via llvm-commits
- [llvm] 42e11a6 - Add transform (and/or (icmp eq/ne (A, C)), (icmp eq/ne (A, -C))) -> (icmp eq/ne (ABS A), ABS(C))
Noah Goldstein via llvm-commits
- [llvm] f895d55 - Remove incorrect comment around `truncateAVX512SetCCNoBWI`; NFC
Noah Goldstein via llvm-commits
- [llvm] 6adf920 - Remove trailing whitespace in `X86InstrAVX512.td`; NFC
Noah Goldstein via llvm-commits
- [llvm] 7adf26e - Revert "Remove incorrect comment around `truncateAVX512SetCCNoBWI`; NFC"
Noah Goldstein via llvm-commits
- [llvm] 8bd0e94 - Revert "Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible"
Noah Goldstein via llvm-commits
- [llvm] 9e9444c - Recommit "Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible" (2nd Try)
Noah Goldstein via llvm-commits
- [llvm] 77af16b - Recommit "Remove incorrect comment around `truncateAVX512SetCCNoBWI`; NFC" (2nd Try)
Noah Goldstein via llvm-commits
- [llvm] 6749d18 - [KnownBits] Add blsi and blsmsk
Noah Goldstein via llvm-commits
- [llvm] c8fb277 - [ValueTracking] Add tests for known bits after common BMI pattern (blsmsk/blsi); NFC
Noah Goldstein via llvm-commits
- [llvm] 9a8f517 - [ValueTracking] Add KnownBits patterns `xor(x, x - 1)` and `and(x, -x)` for knowing upper bits to be zero
Noah Goldstein via llvm-commits
- [llvm] e0ce875 - [ValueTracking] Add tests for additional `isKnownNonZero` cases; NFC
Noah Goldstein via llvm-commits
- [llvm] 3bd38f6 - [ValueTracking] Add cases for additional ops in `isKnownNonZero`
Noah Goldstein via llvm-commits
- [PATCH] D143788: [X86] Add more tests for promoting `blendw` -> `blendd`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143859: [X86] Adding tuning flags for int <-> fp domain switching penalties; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Try to use `{v}shufps` instead of `vpermilps` for common float shuffles.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143859: [X86] Adding tuning flags for int <-> fp domain switching penalties; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143014: [InstCombine] Add combines for `(urem/srem (mul/shl X, Y), (mul/shl X, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143013: [InstCombine] Add tests for combining (urem/srem (mul/shl X, Y), (mul/shl X, Z)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143014: [InstCombine] Add combines for `(urem/srem (mul/shl X, Y), (mul/shl X, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143013: [InstCombine] Add tests for combining (urem/srem (mul/shl X, Y), (mul/shl X, Z)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143014: [InstCombine] Add combines for `(urem/srem (mul/shl X, Y), (mul/shl X, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143417: [InstCombine] Add fold for `(rem (mul/shl X, Y), (mul/shl X, Z))` -> `(mul X, (rem Y, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143014: [InstCombine] Add combines for `(urem/srem (mul/shl X, Y), (mul/shl X, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142343: [X86] Add tests for folding `(and/or (icmp eq/ne A, Pow2), (icmp eq/ne A, -Pow2))`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142344: [DAGCombiner] Add Transform for `(and/or (eq/ne A,Pow2),(eq/ne A,-Pow2))`->`(eq/ne (and (and A,Pow2),~(Pow2*2)), 0)`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142345: [X86] Transform `(icmp eq/ne Abs(A), Pow2)` -> `(and/or (icmp eq/ne A,Pow2), (icmp eq/ne A,-Pow2))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142600: [X86] Tests for (and/or (icmp eq/ne A, C), (icmp eq/ne A, -C)) <--> (icmp eq/ne (ABS A), ABS(C)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142601: [DAGCombiner]: Add transform (and/or (icmp eq/ne (A, C)), (icmp eq/ne (A, -C))) -> (icmp eq/ne (ABS A), ABS(C))
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144060: [X86] Remove incorrect comment around `truncateAVX512SetCCNoBWI`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144061: [X86] Remove trailing whitespace in `X86InstrAVX512.td`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144060: [X86] Remove incorrect comment around `truncateAVX512SetCCNoBWI`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144061: [X86] Remove trailing whitespace in `X86InstrAVX512.td`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143838: [X86] Improve (select carry C1+1 C1)
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143856: [X86] Prioritize lowering V{4|16}F32 with blend.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143785: [X86] Add Extend shuffle pattern to vNf32 shuffles.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143857: [X86] Add tests for shuffle as shift/rotate; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143786: [X86] Add `TuningPreferShiftShuffle` for when Shifts are preferable to shuffles.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143859: [X86] Adding tuning flags for int <-> fp domain switching penalties; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Try to use `{v}shufps` instead of `vpermilps` for common float shuffles.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143788: [X86] Add more tests for promoting `blendw` -> `blendd`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143789: [X86] Widen i16 shuffle masks if vector width < 512 even with BWI
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143860: [X86] Add additional operations that masked instructions can combine with
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143786: [X86] Add `TuningPreferShiftShuffle` for when Shifts are preferable to shuffles.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143014: [InstCombine] Add combines for `(urem/srem (mul/shl X, Y), (mul/shl X, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Try to use `{v}shufps` instead of `vpermilps` for common float shuffles.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144144: [X86] Add tests for combining mask with shuffles; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143860: [X86] Add additional operations that masked instructions can combine with
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Try to use `{v}shufps` instead of `vpermilps` for common float shuffles.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143788: [X86] Add more tests for promoting `blendw` -> `blendd`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143789: [X86] Widen i16 shuffle masks if vector width < 512 even with BWI
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144144: [X86] Add tests for combining mask with shuffles; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143860: [X86] Add additional operations that masked instructions can combine with
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142830: [ValueTracking] Improve non-zero tracking of `X` by also searching through `Use(X)` that imply non-zero
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142832: [ValueTracking] Add support in `isKnownNonZero` for dominating condition from `X > C1 && X < C2`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143417: [InstCombine] Add fold for `(rem (mul/shl X, Y), (mul/shl X, Z))` -> `(mul X, (rem Y, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143788: [X86] Add more tests for promoting `blendw` -> `blendd`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143789: [X86] Widen i16 shuffle masks if vector width < 512 even with BWI
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144144: [X86] Add tests for combining mask with shuffles; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143860: [X86] Add additional operations that masked instructions can combine with
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143856: [X86] Prioritize lowering V{4|16}F32 with blend.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143785: [X86] Add Extend shuffle pattern to vNf32 shuffles.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143857: [X86] Add tests for shuffle as shift/rotate; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143786: [X86] Add `TuningPreferShiftShuffle` for when Shifts are preferable to shuffles.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143859: [X86] Adding tuning flags for int <-> fp domain switching penalties; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143788: [X86] Add more tests for promoting `blendw` -> `blendd`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143789: [X86] Widen i16 shuffle masks if vector width < 512 even with BWI
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144144: [X86] Add tests for combining mask with shuffles; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143860: [X86] Add additional operations that masked instructions can combine with
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143860: [X86] Add additional operations that masked instructions can combine with
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143860: [X86] Add additional operations that masked instructions can combine with
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143013: [InstCombine] Add tests for combining (urem/srem (mul/shl X, Y), (mul/shl X, Z)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143014: [InstCombine] Add combines for `(urem/srem (mul/shl X, Y), (mul/shl X, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144225: [InstCombine] Add constant combines for `(urem/srem (shl X, Y), (shl X, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143417: [InstCombine] Add fold for `(rem (mul/shl X, Y), (mul/shl X, Z))` -> `(mul X, (rem Y, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143014: Add constant combines for `(urem/srem (mul X, Y), (mul X, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D143014: Add constant combines for `(urem/srem (mul X, Y), (mul X, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144282: [X86] Add tests for (or/and (icmp eq/ne A, C0), (icmp eq/ne A, C1)) where IsPow2(dif(C0, C1)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144283: [X86] Make `(and/or (icmp eq/ne A,C0), (icmp eq/ne A,C1))` where `IsPow(dif(C0,C1))` work for more patterns.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144284: [X86] Add transform for `(and/or (icmp eq/ne A,-1),(icmp eq/ne A,-1+C))`->`(and/or (icmp eq/ne (and ~A,-1+C),0))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144284: [X86] Add transform for `(and/or (icmp eq/ne A,-1),(icmp eq/ne A,-1+C))`->`(and/or (icmp eq/ne (and ~A,-1+C),0))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142271: [ValueTracking] Add KnownBits patterns `xor(x, x - 1)` and `and(x, -x)` for knowing upper bits to be zero
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142519: [KnownBits] Add blsi and blsmsk
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142270: [ValueTracking] Add tests for known bits after common BMI pattern (blsmsk/blsi); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142271: [ValueTracking] Add KnownBits patterns `xor(x, x - 1)` and `and(x, -x)` for knowing upper bits to be zero
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142271: [ValueTracking] Add KnownBits patterns `xor(x, x - 1)` and `and(x, -x)` for knowing upper bits to be zero
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142827: [ValueTracking] Add tests for additional `isKnownNonZero` cases; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142828: [ValueTracking] Add cases for additional ops in `isKnownNonZero`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142426: [ValueTracking] Add tests for KnownBits of (and/xor/or X, (add/sub X, OddV)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142849: [ValueTracking] Add helper for handling `computeKnownBits` for and/xor/or; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142849: [ValueTracking] Add helper for handling `computeKnownBits` for and/xor/or; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142427: [ValueTracking] Add logic for tracking lowbit of (and/xor/or X, (add/sub X, Odd))
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142428: [InstCombine] Add tests that patterns for knownbits of and/or/xor apply in `SimplifyDemandedUseBits`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142429: [InstCombine] Use `analyzeKnownBitsFromAndXorOr` in `SimplifyDemandedUseBits` for and/xor/or
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142427: [ValueTracking] Add logic for tracking lowbit of (and/xor/or X, (add/sub X, Odd))
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144284: [X86] Add transform for `(and/or (icmp eq/ne A,-1),(icmp eq/ne A,-1+C))`->`(and/or (icmp eq/ne (and ~A,-1+C),0))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144282: [X86] Add tests for (or/and (icmp eq/ne A, C0), (icmp eq/ne A, C1)) where IsPow2(dif(C0, C1)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144282: [X86] Add tests for (or/and (icmp eq/ne A, C0), (icmp eq/ne A, C1)) where IsPow2(dif(C0, C1)); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144283: [X86] Make `(and/or (icmp eq/ne A,C0), (icmp eq/ne A,C1))` where `IsPow(dif(C0,C1))` work for more patterns.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144283: [X86] Make `(and/or (icmp eq/ne A,C0), (icmp eq/ne A,C1))` where `IsPow(dif(C0,C1))` work for more patterns.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144284: [X86] Add transform for `(and/or (icmp eq/ne A,-1),(icmp eq/ne A,-1+C))`->`(and/or (icmp eq/ne (and ~A,-1+C),0))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144106: [InstSimplify] Fix poison safety in insertvalue fold
Nuno Lopes via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D143619: [llvm][codegen] Disallow default Emulated TLS for RISCV
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D143708: [RISCV] Support emulated TLS
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D143513: [DebugInfo] Allow parsing line tables aligned to 4 or 8-byte boundaries
Paul Robinson via Phabricator via llvm-commits
- [llvm] 5650485 - [NFC][SVE] Refactor isel for floating multiply-add operations to use PatFrags.
Paul Walker via llvm-commits
- [llvm] cf4df61 - [SVE] Add intrinsics for floating-point operations that explicitly undefine the result for inactive lanes.
Paul Walker via llvm-commits
- [PATCH] D143765: [SVE] Add intrinsics for floating-point operations that explicitly undefine the result for inactive lanes.
Paul Walker via Phabricator via llvm-commits
- [PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Paul Walker via Phabricator via llvm-commits
- [PATCH] D142894: [LoopVectorize] Use overflow-check analysis to improve tail-folding.
Paul Walker via Phabricator via llvm-commits
- [PATCH] D134422: Scalarize calls to masked functions in LV
Paul Walker via Phabricator via llvm-commits
- [PATCH] D142656: [SVE][codegen] Add pattern for SVE multiply-add accumulate
Paul Walker via Phabricator via llvm-commits
- [PATCH] D143764: [NFC][SVE] Refactor isel for floating multiply-add operations to use PatFrags.
Paul Walker via Phabricator via llvm-commits
- [PATCH] D136862: [AArch64][SME2] Add CodeGen support for target("aarch64.svcount").
Paul Walker via Phabricator via llvm-commits
- [PATCH] D143765: [SVE] Add intrinsics for floating-point operations that explicitly undefine the result for inactive lanes.
Paul Walker via Phabricator via llvm-commits
- [PATCH] D128440: [WebAssembly] Initial support for reference type funcref in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D128440: [WebAssembly] Initial support for reference type funcref in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D128440: [WebAssembly] Initial support for reference type funcref in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D128440: [WebAssembly] Initial support for reference type funcref in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D128440: [WebAssembly] Initial support for reference type funcref in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D128440: [WebAssembly] Initial support for reference type funcref in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D128440: [WebAssembly] Initial support for reference type funcref in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D122215: [WebAssembly] Initial support for reference type externref in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D128440: [WebAssembly] Initial support for reference type funcref in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D139010: [clang][WebAssembly] Implement support for table types and builtins
Paulo Matos via Phabricator via llvm-commits
- [llvm] 36606cf - [NFC] Replace -1U{LL} expressions with appropriate *_MAX macros in Support library.
Pavel Kopyl via llvm-commits
- [llvm] 01afb3f - [NVPTX] Use by default 'sm_60' architecture when expanding %ptxas-verify macro.
Pavel Kopyl via llvm-commits
- [PATCH] D143942: [NFC] Replace -1U{LL} expressions with appropriate *_MAX macros in Support library.
Pavel Kopyl via Phabricator via llvm-commits
- [PATCH] D143942: [NFC] Replace -1U{LL} expressions with appropriate *_MAX macros in Support library.
Pavel Kopyl via Phabricator via llvm-commits
- [PATCH] D143942: [NFC] Replace -1U{LL} expressions with appropriate *_MAX macros in Support library.
Pavel Kopyl via Phabricator via llvm-commits
- [PATCH] D143942: [NFC] Replace -1U{LL} expressions with appropriate *_MAX macros in Support library.
Pavel Kopyl via Phabricator via llvm-commits
- [PATCH] D140436: [NVPTX] Add support of ptxas v12.0 to the LIT tests
Pavel Kopyl via Phabricator via llvm-commits
- [PATCH] D141736: [NVPTX] Use 'sm_60' architecture when expanding %ptxas-verify macro.
Pavel Kopyl via Phabricator via llvm-commits
- [PATCH] D143942: [NFC] Replace -1U{LL} expressions with appropriate *_MAX macros in Support library.
Pavel Kopyl via Phabricator via llvm-commits
- [PATCH] D141736: [NVPTX] Use 'sm_60' architecture when expanding %ptxas-verify macro.
Pavel Kopyl via Phabricator via llvm-commits
- [PATCH] D141736: [NVPTX] Use 'sm_60' architecture when expanding %ptxas-verify macro.
Pavel Kopyl via Phabricator via llvm-commits
- [PATCH] D141736: [NVPTX] Use by default 'sm_60' architecture when expanding %ptxas-verify macro.
Pavel Kopyl via Phabricator via llvm-commits
- [PATCH] D144024: Fix test hang if curl is not installed
Pavel Kosov via Phabricator via llvm-commits
- [PATCH] D144025: Cleanup tests
Pavel Kosov via Phabricator via llvm-commits
- [PATCH] D143915: [llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
Pengxuan Zheng via Phabricator via llvm-commits
- [PATCH] D144156: [TextAPI] Implement TBDv5 Reader
Pete Cooper via Phabricator via llvm-commits
- [PATCH] D144158: [TextAPI] Capture new properties from TBD to InterfaceFile
Pete Cooper via Phabricator via llvm-commits
- [PATCH] D65857: [MC][AArch64] Restrict use of signed relocation operators on MOV[NZK]
Peter Collingbourne via Phabricator via llvm-commits
- [PATCH] D144079: [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
Peter Smith via Phabricator via llvm-commits
- [PATCH] D144079: [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
Peter Smith via Phabricator via llvm-commits
- [PATCH] D144083: [JITLink] Initial 32-bit ARM backend
Peter Smith via Phabricator via llvm-commits
- [PATCH] D144083: [JITLink] Initial 32-bit ARM backend
Peter Smith via Phabricator via llvm-commits
- [PATCH] D143468: [CMake] Remove custom ccache CMake logic
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D143644: [SCEV] Add a test where the trip count can't be calculated
Phabricator via llvm-commits
- [PATCH] D141595: [AArch64][SME]: Add missing Ops that need custom-lowering in streaming mode.
Phabricator via llvm-commits
- [PATCH] D143433: [AArch64][SME]: Custom-lower SIGN_EXTEND_INREG for streaming SVE
Phabricator via llvm-commits
- [PATCH] D143434: [AArch64][SME]: Custom lower select and fp_extend for streaming SVE
Phabricator via llvm-commits
- [PATCH] D136827: [JT][CT] Preserve exisiting BPI/BFI during JumpThreading
Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add `at` method (assertive lookup) to DenseMap and StringMap
Phabricator via llvm-commits
- [llvm] d44b31e - [DAGCombine] Allow DAGCombine to remove dead masked stores.
Philip Reames via llvm-commits
- [llvm] 0c412fe - [RISCV][docs] Describe status of zicsr and zifencei
Philip Reames via llvm-commits
- [llvm] 9dd1168 - [docs] Speculative link syntax fix
Philip Reames via llvm-commits
- [llvm] 80abf86 - Revert "[RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)"
Philip Reames via llvm-commits
- [llvm] 80334ca - Revert "Update: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)"
Philip Reames via llvm-commits
- [llvm] 2d6713b - Revert "[RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)"
Philip Reames via llvm-commits
- [llvm] f6fa5a6 - [RISCV][MC] Add support for experimental zfa extension (FLI instruction not included)
Philip Reames via llvm-commits
- [llvm] 891b091 - Revert "[RISCV][MC] Add support for experimental zfa extension (FLI instruction not included)"
Philip Reames via llvm-commits
- [llvm] 22e199e - [RISCV] Accept zicsr and zifencei command line options
Philip Reames via llvm-commits
- [llvm] c0947dc - [RISCV][MC] Add support for experimental zfa extension (FLI instruction not included) (try 3)
Philip Reames via llvm-commits
- [llvm] df56b55 - [RISCV][CodeGen] Add codegen patterns for experimental zfa extension (try 2)
Philip Reames via llvm-commits
- [llvm] 495b653 - [RISCV] Add missing plumbing and tests for zfa
Philip Reames via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143924: [RISCV][docs] Describe status of zicsr and zifencei
Philip Reames via Phabricator via llvm-commits
- [PATCH] D141666: [RISCV] Proper support of extensions Zicsr and Zifencei
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143924: [RISCV][docs] Describe status of zicsr and zifencei
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Philip Reames via Phabricator via llvm-commits
- [PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension
Philip Reames via Phabricator via llvm-commits
- [PATCH] D141984: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143722: [RISCV][NFC] Add test for different LMULs in vectorizer
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143723: [RISCV] Increase default vectorizer LMUL to 2
Philip Reames via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143345: [RFC][RISCV] Don't disassemble `addi`s with relocations as `mv`s
Philip Reames via Phabricator via llvm-commits
- [PATCH] D144048: [RISCV] Add preferred function and loop alignment RISCVSubtarget. NFC
Philip Reames via Phabricator via llvm-commits
- [PATCH] D141984: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Philip Reames via Phabricator via llvm-commits
- [PATCH] D141984: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Philip Reames via Phabricator via llvm-commits
- [PATCH] D141984: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Philip Reames via Phabricator via llvm-commits
- [PATCH] D141984: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options
Philip Reames via Phabricator via llvm-commits
- [PATCH] D144215: [WIP][RISCV] Accept zicntr and zihpm command line options
Philip Reames via Phabricator via llvm-commits
- [PATCH] D144166: [RISCV] For rv32, accept constants like 0xfffff800 as a valid simm12.
Philip Reames via Phabricator via llvm-commits
- [PATCH] D144143: [RISCV] Improve isInterleaveShuffle to handle interleaving the high half and low half of the same source.
Philip Reames via Phabricator via llvm-commits
- [PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Philip Reames via Phabricator via llvm-commits
- [PATCH] D144166: [RISCV] For rv32, accept constants like 0xfffff800 as a valid simm12.
Philip Reames via Phabricator via llvm-commits
- [PATCH] D144143: [RISCV] Improve isInterleaveShuffle to handle interleaving the high half and low half of the same source.
Philip Reames via Phabricator via llvm-commits
- [PATCH] D141984: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Philip Reames via Phabricator via llvm-commits
- [PATCH] D143982: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)
Philip Reames via Phabricator via llvm-commits
- [PATCH] D144288: [RISCV] Add missing plumbing and tests for zfa
Philip Reames via Phabricator via llvm-commits
- [PATCH] D144288: [RISCV] Add missing plumbing and tests for zfa
Philip Reames via Phabricator via llvm-commits
- [PATCH] D144288: [RISCV] Add missing plumbing and tests for zfa
Philip Reames via Phabricator via llvm-commits
- [llvm] 04a2baf - [RISCV] Add vendor-defined XTHeadBs (single-bit) extension
Philipp Tomsich via llvm-commits
- [llvm] fc02eeb - [RISCV] Add vendor-defined XTheadBb (basic bit-manipulation) extension
Philipp Tomsich via llvm-commits
- [llvm] 1232b9d - [RISCV] Fix -Wbraced-scalar-init warning. NFC
Philipp Tomsich via llvm-commits
- [llvm] d4012bc - [RISCV] Add vendor-defined XTheadMAC (multiply-accumulate) extension
Philipp Tomsich via llvm-commits
- [llvm] 055cd78 - [RISCV] Untabify THMulAccumulate_rr. NFC.
Philipp Tomsich via llvm-commits
- [llvm] d291854 - [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Philipp Tomsich via llvm-commits
- [llvm] 20cc23c - [RISCV] Add performMULcombine to perform strength-reduction
Philipp Tomsich via llvm-commits
- [llvm] 6774ba8 - [RISCV] xtheadmac: fix commutativity issue for the in/out register
Philipp Tomsich via llvm-commits
- [llvm] 16a66af - Revert "[RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension"
Philipp Tomsich via llvm-commits
- [llvm] efe7c4b - Revert "[RISCV] Add performMULcombine to perform strength-reduction"
Philipp Tomsich via llvm-commits
- [llvm] 10b7cd6 - [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Philipp Tomsich via llvm-commits
- [PATCH] D143036: [RISCV] Add vendor-defined XTHeadBs (single-bit) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D143439: [RISCV] Add vendor-defined XTheadBb (basic bit-manipulation) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D143439: [RISCV] Add vendor-defined XTheadBb (basic bit-manipulation) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D143847: [RISCV] Add vendor-defined XTheadMAC (multiply-accumulate) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D143847: [RISCV] Add vendor-defined XTheadMAC (multiply-accumulate) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D143847: [RISCV] Add vendor-defined XTheadMAC (multiply-accumulate) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D143847: [RISCV] Add vendor-defined XTheadMAC (multiply-accumulate) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D143847: [RISCV] Add vendor-defined XTheadMAC (multiply-accumulate) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144278: [RISCV] xtheadmac: fix commutativity issue for the in/out register
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D143394: [RISCV] Add performMULcombine to perform strength-reduction
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144278: [RISCV] xtheadmac: fix commutativity issue for the in/out register
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144002: [RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D143394: [RISCV] Add performMULcombine to perform strength-reduction
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Philipp Tomsich via Phabricator via llvm-commits
- [llvm] 6a6c527 - [X86][FP16] Combine two steps conversions into direct conversion
Phoebe Wang via llvm-commits
- [PATCH] D143872: [X86][FP16] Combine two steps conversions into direct conversion
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D143872: [X86][FP16] Combine two steps conversions into direct conversion
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D138899: [DAGCombiner] handle more store value forwarding
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D143618: [X86] Fix for offsets of CFA directives
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D144183: [X86][MC] Fix the bug of -output-asm-variant=1 for intel syntax
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D142907: LangRef: Add "dynamic" option to "denormal-fp-math"
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D144284: [X86] Add transform for `(and/or (icmp eq/ne A,-1),(icmp eq/ne A,-1+C))`->`(and/or (icmp eq/ne (and ~A,-1+C),0))`
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D144283: [X86] Make `(and/or (icmp eq/ne A,C0), (icmp eq/ne A,C1))` where `IsPow(dif(C0,C1))` work for more patterns.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D144282: [X86] Add tests for (or/and (icmp eq/ne A, C0), (icmp eq/ne A, C1)) where IsPow2(dif(C0, C1)); NFC
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D144282: [X86] Add tests for (or/and (icmp eq/ne A, C0), (icmp eq/ne A, C1)) where IsPow2(dif(C0, C1)); NFC
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D143886: [DAG] Handle build_vector with all undefs in reduceBuildVecTruncToBitCast
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D143731: [AMDGPU] Scalarize some large PHIs for DAGISel
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D139000: [AMDGPU] Remove function with incompatible features
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D143731: [AMDGPU] Break-up large PHIs for DAGISel
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D143886: [DAG] Handle build_vector with all undefs in reduceBuildVecTruncToBitCast
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D143886: [DAG] Handle build_vector with all undefs in reduceBuildVecTruncToBitCast
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D143731: [AMDGPU] Break-up large PHIs for DAGISel
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D143731: [AMDGPU] Break-up large PHIs for DAGISel
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D143731: [AMDGPU] Break-up large PHIs for DAGISel
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D144099: [WIP][AMDGPU] Fold more AGPR copies/PHIs in SIFoldOperands
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D144099: [WIP][AMDGPU] Fold more AGPR copies/PHIs in SIFoldOperands
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D144099: [WIP][AMDGPU] Fold more AGPR copies/PHIs in SIFoldOperands
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D144099: [WIP][AMDGPU] Fold more AGPR copies/PHIs in SIFoldOperands
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D144099: [WIP][AMDGPU] Fold more AGPR copies/PHIs in SIFoldOperands
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D143731: [AMDGPU] Break-up large PHIs for DAGISel
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D141129: [InstCombine] Use KnownBits for lshr/add -> (a + b < a)
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D139000: [AMDGPU] Remove function with incompatible features
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D144232: [PowerPC] Correctly use ELFv2 ABI on FreeBSD/powerpc64
Piotr Kubaj via Phabricator via llvm-commits
- [PATCH] D144232: [PowerPC] Correctly use ELFv2 ABI on FreeBSD/powerpc64
Piotr Kubaj via Phabricator via llvm-commits
- [PATCH] D144232: [PowerPC] Correctly use ELFv2 ABI on FreeBSD/powerpc64
Piotr Kubaj via Phabricator via llvm-commits
- [PATCH] D143945: [AMDGPU] Add legalization case for PTR_ADD on buffer pointers
Piotr Sobczak via Phabricator via llvm-commits
- [llvm] a17bfba - [RISCV] precommit test for D129735
Piyou Chen via llvm-commits
- [llvm] f1c4241 - [RISCV] Add new pass to transform undef to pseudo for vector values.
Piyou Chen via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D137763: [RISCV] precommit test for D129735
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D144062: Fix bazel build
Pranav Kant via Phabricator via llvm-commits
- [PATCH] D144122: [Bazel] Port 78e172f
Pranav Kant via Phabricator via llvm-commits
- [PATCH] D144122: [Bazel] Port 78e172fc92e74be3347409e4a67432c97f071818
Pranav Kant via Phabricator via llvm-commits
- [PATCH] D144212: [Bazel][mlir] Fix build errors
Pranav Kant via Phabricator via llvm-commits
- [PATCH] D144212: [Bazel][mlir] Fix build errors
Pranav Kant via Phabricator via llvm-commits
- [PATCH] D144189: [AIX][CodeGen] Storage Locations for Constant Pointers
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D144189: [AIX][CodeGen] Storage Locations for Constant Pointers
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D144189: [AIX][CodeGen] Storage Locations for Constant Pointers
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D144302: [PGO] Setting ValueProfNode Array's Alignment
Qiongsi Wu via Phabricator via llvm-commits
- [PATCH] D138696: [PowerPC] Exploit test data class instruction for isinf/iszero
Qiu Chaofan via Phabricator via llvm-commits
- [PATCH] D143747: [mlir][MemRef][Transform] Don't apply multibuffer on "useless" allocs
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143747: [mlir][MemRef][Transform] Don't apply multibuffer on "useless" allocs
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143747: [mlir][MemRef][Transform] Don't apply multibuffer on "useless" allocs
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143747: [mlir][MemRef][Transform] Don't apply multibuffer on "useless" allocs
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143729: [mlir][MemRef][TransformOps] Fix error reporting for multibuffer
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143729: [mlir][MemRef][TransformOps] Fix error reporting for multibuffer
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143747: [mlir][MemRef][Transform] Don't apply multibuffer on "useless" allocs
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143999: [mlir][MemRef|Tensor] Fix the handling of DimOp
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143742: [VirtRegMap] Further optimize emitting KILL for copy
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143753: [MachineInstr] Introduce TII buildCopy helper functions (NFC).
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143999: [mlir][MemRef|Tensor] Fix the handling of DimOp
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143999: [mlir][MemRef|Tensor] Fix the handling of DimOp
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D143742: [VirtRegMap] Further optimize emitting KILL for copy
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144260: [mlir][linalg][TransformOps] Connect hoistRedundantVectorTransfers
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144260: [mlir][linalg][TransformOps] Connect hoistRedundantVectorTransfers
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144260: [mlir][linalg][TransformOps] Connect hoistRedundantVectorTransfers
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Quinn Dawkins via Phabricator via llvm-commits
- [PATCH] D142668: [BOLT] Add isParentOf and isSiblingOf BinaryFunction methods
Rafael Auler via Phabricator via llvm-commits
- [PATCH] D144095: [BOLT] Fix data reoder for aarch64
Rafael Auler via Phabricator via llvm-commits
- [PATCH] D143671: [Flang][OpenMP] Added parser support for device_type clause
Raghu via Phabricator via llvm-commits
- [PATCH] D142914: [MLIR][OpenMP] Added OMPIRBuilder support for Target Data directives.
Raghu via Phabricator via llvm-commits
- [PATCH] D143841: [Propeller] Make decoding BBAddrMaps trace through relocations
Rahman Lavaee via Phabricator via llvm-commits
- [PATCH] D142288: [X86] Add basic vector handling for ISD::ABDS/ABDU (absolute difference) nodes
Ricardo Jesus via Phabricator via llvm-commits
- [llvm] a9329a9 - Adjust #pragma warning so GCC is not unhappy
Roger Ferrer Ibanez via llvm-commits
- [PATCH] D143885: Adjust #pragma warning so GCC is not unhappy
Roger Ferrer Ibanez via Phabricator via llvm-commits
- [PATCH] D143885: Adjust #pragma warning so GCC is not unhappy
Roger Ferrer Ibanez via Phabricator via llvm-commits
- [PATCH] D143885: Adjust #pragma warning so GCC is not unhappy
Roger Ferrer Ibanez via Phabricator via llvm-commits
- [PATCH] D143885: Adjust #pragma warning so GCC is not unhappy
Roger Ferrer Ibanez via Phabricator via llvm-commits
- [PATCH] D143885: Adjust #pragma warning so GCC is not unhappy
Roger Ferrer Ibanez via Phabricator via llvm-commits
- [PATCH] D143424: [Pipeline] Move ControlHeightReduction to module optimization pipeline
Rong Xu via Phabricator via llvm-commits
- [PATCH] D144209: [ThinLTO/WPD] Handle function alias in vtable correctly
Rong Xu via Phabricator via llvm-commits
- [llvm] 511d550 - [NFC] Testing new commit access by adding newline
Ryan Guo via llvm-commits
- [llvm] f2404a5 - [NDF] Revert earlier nfc commit to test commit access
Ryan Guo via llvm-commits
- [llvm] 1320036 - [ADT] Add `at` method (assertive lookup) to DenseMap and StringMap
Ryan Guo via llvm-commits
- [llvm] be83a4b - [ADT] Fix tests for `StringMap::at` and `DenseMap::at`
Ryan Guo via llvm-commits
- [PATCH] D143998: [GISel] Fix types of operands of G_INDEXED_*
Rémi SEGARD via Phabricator via llvm-commits
- [PATCH] D143998: [GISel] Fix types of operands of G_INDEXED_*
Rémi SEGARD via Phabricator via llvm-commits
- [PATCH] D144178: [CMake] Enforce LLVM_ENABLE_UNWIND_TABLES
Saleem Abdulrasool via Phabricator via llvm-commits
- [lld] 9369b7d - [lld][WebAssembly] Limit size of shared 64-bit memories of 2^^34
Sam Clegg via llvm-commits
- [PATCH] D143783: [lld][WebAssembly] Limit size of shared 64-bit memories of 2^^34
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D143885: Adjust #pragma warning so GCC is not unhappy
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D143885: Adjust #pragma warning so GCC is not unhappy
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D140982: [HardwareLoops] NewPM support
Sam Parker via Phabricator via llvm-commits
- [PATCH] D140982: [HardwareLoops] NewPM support
Sam Parker via Phabricator via llvm-commits
- [PATCH] D143988: [AArch64] Always lower fp16 zero to FMOVH0
Sam Tebbs via Phabricator via llvm-commits
- [PATCH] D144070: [llvm][GenericUniformity] Prevent assert while calculating temporal divergence
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D144167: [UniformityAnalysis] Fix some file headers and pass names
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D144167: [UniformityAnalysis] Fix some file headers and pass names
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D144070: [llvm][GenericUniformity] Prevent assert while calculating temporal divergence
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D144070: [llvm][GenericUniformity] Prevent assert while calculating temporal divergence
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D144162: [AMDGPU] Replace LegacyDA with Uniformity Analysis in AnnotateUniformValues
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D144162: [AMDGPU] Replace LegacyDA with Uniformity Analysis in AnnotateUniformValues
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D144254: [llvm][Uniformity] a phi with an undef argument is not always divergent
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D144162: [AMDGPU] Replace LegacyDA with Uniformity Analysis in AnnotateUniformValues
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [llvm] 2a58be4 - [HardwareLoops] NewPM support.
Samuel Parker via llvm-commits
- [llvm] 8f104a3 - [ARM] O3-pipeline fix
Samuel Parker via llvm-commits
- [llvm] c7f9344 - [DAGCombine] Fold redundant select
Samuel Parker via llvm-commits
- [llvm] 462227f - [SROA] NFC: Look at TypeStoreSize scalable property, rather than at type directly.
Sander de Smalen via llvm-commits
- [PATCH] D143069: [DAGCombine] Allow DAGCombine to remove dead masked stores
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D143069: [DAGCombine] Allow DAGCombine to remove dead masked stores
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Don't let InstCombine re-sink the vastly more expensive fdiv
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D143764: [NFC][SVE] Refactor isel for floating multiply-add operations to use PatFrags.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D136861: [IR] Add LLVM IR support for target("aarch64.svcount") type.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D142542: [InstSimplify] Simplify icmp between Shl instructions of the same value
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D142542: [InstSimplify] Simplify icmp between Shl instructions of the same value
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D136861: [IR] Add LLVM IR support for target("aarch64.svcount") type.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D143014: [InstCombine] Add combines for `(urem/srem (mul/shl X, Y), (mul/shl X, Z))`
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D143014: [InstCombine] Add combines for `(urem/srem (mul/shl X, Y), (mul/shl X, Z))`
Sander de Smalen via Phabricator via llvm-commits
- [llvm] 4a4e44e - [InstCombine] add test for loop-invariant fdiv; NFC
Sanjay Patel via llvm-commits
- [llvm] 83ba349 - [InstSimplify] fix/improve folding with an SNaN operand
Sanjay Patel via llvm-commits
- [llvm] ac2f13f - [InstSimplify] add tests for vectors with SNaN constants; NFC
Sanjay Patel via llvm-commits
- [llvm] 74a2dd1 - [InstSimplify] fix/improve folding with an SNaN vector element operand
Sanjay Patel via llvm-commits
- [llvm] 4c34086 - [LangRef] improve documentation of SNaN in the default FP environment
Sanjay Patel via llvm-commits
- [llvm] 50ef867 - [InstCombine] remove stale test comment; NFC
Sanjay Patel via llvm-commits
- [llvm] 4ecc6af - [InstCombine] create a pass options container and add "use-loop-info" argument
Sanjay Patel via llvm-commits
- [llvm] a883163 - [InstCombine] add tests for 1<<cttz(x); NFC
Sanjay Patel via llvm-commits
- [llvm] 8e8467d - [InstCombine] canonicalize "extract lowest set bit" away from cttz intrinsic
Sanjay Patel via llvm-commits
- [PATCH] D143373: [InstCombine] fold icmp of the sum of ext bool based on limited range
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Don't let InstCombine re-sink the vastly more expensive fdiv
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143542: [SeparateConstOffsetFromGEP] Fix: `b - a` matched `a - b` during reuniteExts
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Don't let InstCombine re-sink the vastly more expensive fdiv
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D87479: [InstCombine] Don't sink the fdiv from (fmul (fdiv 1.0, %x), %y) if the fdiv isn't in the same basic block as the fmul
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143542: [SeparateConstOffsetFromGEP] Fix: `b - a` matched `a - b` during reuniteExts
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143505: [InstSimplify] fix/improve folding with an SNaN operand
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143074: [LangRef] improve documentation of SNaN in the default FP environment
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143074: [LangRef] improve documentation of SNaN in the default FP environment
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143373: [InstCombine] fold icmp of the sum of ext bool based on limited range
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143505: [InstSimplify] fix/improve folding with an SNaN operand
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Don't let InstCombine re-sink the vastly more expensive fdiv
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Don't let InstCombine re-sink the vastly more expensive fdiv
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D144001: [Metarenamer] Use 'val' as default name for instructions
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Don't let InstCombine re-sink the vastly more expensive fdiv
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D144045: [InstCombine] avoid sinking fdiv into a loop
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143505: [InstSimplify] fix/improve folding with an SNaN operand
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143074: [LangRef] improve documentation of SNaN in the default FP environment
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D144106: [InstSimplify] Fix poison safety in insertvalue fold
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143593: [InstCombine] Don't fold freeze poison when it's used in shufflevector
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D144199: [InstCombine] create and use a pass options container
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D144199: [InstCombine] create and use a pass options container
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D144199: [InstCombine] create and use a pass options container
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D144274: [InstCombine] use loop info when running the pass after loop vectorization
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D144274: [InstCombine] use loop info when running the pass after loop vectorization
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D144329: [InstCombine] canonicalize "extract lowest set bit" away from cttz intrinsic
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D144329: [InstCombine] canonicalize "extract lowest set bit" away from cttz intrinsic
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D144329: [InstCombine] canonicalize "extract lowest set bit" away from cttz intrinsic
Sanjay Patel via Phabricator via llvm-commits
- [lld] 45ee0a9 - [LLD] Add --lto-CGO[0-3] option
Scott Linder via llvm-commits
- [PATCH] D141970: [LLD] Add --lto-CGO[0-3] option
Scott Linder via Phabricator via llvm-commits
- [PATCH] D144176: [AMDGPU] Add cross-project-tests for WMMA builtins
Scott Linder via Phabricator via llvm-commits
- [PATCH] D144301: [dwarfdump][AMDGPU] Support EF_AMDGPU_MACH_NONE
Scott Linder via Phabricator via llvm-commits
- [PATCH] D45508: Implement --ctors-in-init-array.
Seraphime Kirkovski (VMware) via Phabricator via llvm-commits
- [PATCH] D45508: Implement --ctors-in-init-array.
Seraphime Kirkovski (VMware) via Phabricator via llvm-commits
- [PATCH] D144202: [ADT] Alternative way to declare enum type as bitmask
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D144241: [NFC] Make FPClassTest a bitmask enumeration
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D144210: [TableGen] Delete support for deprecated positional matching.
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D144211: [BOLT] computing raw branch count for yaml profiles
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D144306: [BOLT] adding hash computation for basic blocks
Sergey Pupyrev via Phabricator via llvm-commits
- [llvm] feb2ab9 - [SimpleLoopUnswitch] Fix an assert in injectPendingInvariantConditions
Serguei Katkov via llvm-commits
- [PATCH] D143175: [SimpleLoopUnswitch] Canonicalize conditions for injection of invariant condition
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D143175: [SimpleLoopUnswitch] Canonicalize conditions for injection of invariant condition
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D144361: [SimpleLoopUnswitch] Fix an assert in injectPendingInvariantConditions
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D144361: [SimpleLoopUnswitch] Fix an assert in injectPendingInvariantConditions
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D143316: [m68k] Implement absolution long addressing mode for ADDA instruction
Sheng via Phabricator via llvm-commits
- [PATCH] D143315: [m68k] Implement BSR Instruction
Sheng via Phabricator via llvm-commits
- [PATCH] D143317: [m68k] Add TLS support
Sheng via Phabricator via llvm-commits
- [llvm] df277ec - [X86][MC] Fix the bug of -output-asm-variant=1 for intel syntax
Shengchen Kan via llvm-commits
- [llvm] d374546 - [X86][NFC] Assert MRMr0 format from emitREXPrefix
Shengchen Kan via llvm-commits
- [PATCH] D142569: [OpenMP] Introduce kernel environment
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D142569: [OpenMP] Introduce kernel environment
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D142569: [OpenMP] Introduce kernel environment
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D143248: Emit CFI directives in epilogue and enable CFIFixup pass for RISC-V.
Shiva Chen via Phabricator via llvm-commits
- [PATCH] D135248: [libc++] implement move_iterator<T*> should be a random access iterator
Shivam Rajput via Phabricator via llvm-commits
- [PATCH] D135248: [libc++] implement move_iterator<T*> should be a random access iterator
Shivam Rajput via Phabricator via llvm-commits
- [PATCH] D139254: Enhance stack protector
Shoaib Meenai via Phabricator via llvm-commits
- [lld] 674f094 - [lld][ARM][NFCI][1/3]Big Endian support - Removing assumptions
Simi Pallipurath via llvm-commits
- [PATCH] D140201: [lld][ARM][NFCI][1/3]Big Endian support - Removing assumptions
Simi Pallipurath via Phabricator via llvm-commits
- [PATCH] D140201: [lld][ARM][NFCI][1/3]Big Endian support - Removing assumptions
Simi Pallipurath via Phabricator via llvm-commits
- [PATCH] D140201: [lld][ARM][NFCI][1/3]Big Endian support - Removing assumptions
Simi Pallipurath via Phabricator via llvm-commits
- [PATCH] D140202: [lld][ARM][2/3]Big Endian support - Word invariant support
Simi Pallipurath via Phabricator via llvm-commits
- [llvm] d3b0fba - Revert rG0b0a38a7a229b70d7261771ba0e702843bd34e97 : "[X86] combineX86ShufflesRecursively - don't widen shuffle subvector inputs"
Simon Pilgrim via llvm-commits
- [llvm] b0e7ca7 - [X86] Remove abs(sub_nsw()) -> abds fold from adbu test file
Simon Pilgrim via llvm-commits
- [PATCH] D143838: [X86] Improve (select carry C1+1 C1)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Try to use `{v}shufps` instead of `vpermilps` for common float shuffles.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143859: [X86] Adding tuning flags for int <-> fp domain switching penalties; NFC
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143882: [ADT] Add llvm::rotl and llvm::rotr to bit.h
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143789: [X86] Widen i16 shuffle masks if vector width < 512 even with BWI
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143788: [X86] Add more tests for promoting `blendw` -> `blendd`; NFC
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143859: [X86] Adding tuning flags for int <-> fp domain switching penalties; NFC
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143856: [X86] Prioritize lowering V{4|16}F32 with blend.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143859: [X86] Adding tuning flags for int <-> fp domain switching penalties; NFC
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D142313: [PowerPC] Replace PPCISD::VABSD cases with generic ISD::ABDU(X,Y) node
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143786: [X86] Add `TuningPreferShiftShuffle` for when Shifts are preferable to shuffles.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143990: [llvm] Deprecate {Bits,Float,Double}To{Bits,Float,Double} (NFC)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D144075: [DAGCombiner] Teach MatchContextClass classes to use TargetLowering::isOperationLegalOrCustom().
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143860: [X86] Add additional operations that masked instructions can combine with
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Try to use `{v}shufps` instead of `vpermilps` for common float shuffles.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D142288: [X86] Add basic vector handling for ISD::ABDS/ABDU (absolute difference) nodes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143883: [InstCombine] canonicalize urem as cmp+select
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D144010: [X86] AMD Znver4 (Genoa) Scheduler enablement
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D144010: [X86] AMD Znver4 (Genoa) Scheduler enablement
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143860: [X86] Add additional operations that masked instructions can combine with
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D144116: [DAGCombiner] Avoid converting (x or/xor const) + y to (x + y) + const if benefit is unclear
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D144116: [DAGCombiner] Avoid converting (x or/xor const) + y to (x + y) + const if benefit is unclear
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143044: [InstCombine][NFC] Add tests pre-implementation of issue #54856
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D144183: [X86][MC] Fix the bug of -output-asm-variant=1 for intel syntax
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D144144: [X86] Add tests for combining mask with shuffles; NFC
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143860: [X86] Add additional operations that masked instructions can combine with
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D144244: [X86]rearange X86InstrInfo.td
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143786: [X86] Add `TuningPreferShiftShuffle` for when Shifts are preferable to shuffles.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143857: [X86] Add tests for shuffle as shift/rotate; NFC
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D144128: [SLP] Check with target before vectorizing GEP Indices
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D141940: [SLP]Add shuffling of extractelements to avoid extra costs/data movement.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D141940: [SLP]Add shuffling of extractelements to avoid extra costs/data movement.
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] f6ddf77 - [LowerTypeTests] Support generating Armv6-M jump tables.
Simon Tatham via llvm-commits
- [llvm] bbef383 - Revert "[LowerTypeTests] Support generating Armv6-M jump tables."
Simon Tatham via llvm-commits
- [PATCH] D144079: [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
Simon Tatham via Phabricator via llvm-commits
- [PATCH] D144079: [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
Simon Tatham via Phabricator via llvm-commits
- [PATCH] D143576: [LowerTypeTests] Support generating Armv6-M jump tables.
Simon Tatham via Phabricator via llvm-commits
- [PATCH] D143576: [LowerTypeTests] Support generating Armv6-M jump tables.
Simon Tatham via Phabricator via llvm-commits
- [PATCH] D142975: [AsmPrinter] Allow .cfi_restore_state to be put at the end of a function
Sinan Lin via Phabricator via llvm-commits
- [PATCH] D142288: [X86] Add basic vector handling for ISD::ABDS/ABDU (absolute difference) nodes
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D143988: [AArch64] Always lower fp16 zero to FMOVH0
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D144101: [test-suite] Increase the --filter-short threshold
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D142359: [TTI][AArch64] Cost model vector INS instructions
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D144086: [AArch64] Load into zero vector patterns
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D142359: [TTI][AArch64] Cost model vector INS instructions
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D144220: New SetOperations and unittesting for all SetOperations
Snehasish Kumar via Phabricator via llvm-commits
- [llvm] 12b4f9e - [AMDGPU] Do not apply schedule metric for regions with spilling
Stanislav Mekhanoshin via llvm-commits
- [PATCH] D143934: [AMDGPU] Do not apply schedule metric for regions with spilling
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D143934: [AMDGPU] Do not apply schedule metric for regions with spilling
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D143934: [AMDGPU] Do not apply schedule metric for regions with spilling
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D143934: [AMDGPU] Do not apply schedule metric for regions with spilling
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D143934: [AMDGPU] Do not apply schedule metric for regions with spilling
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D142507: [AMDGPU] Split dot7 feature
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Stanley Winata via Phabricator via llvm-commits
- [llvm] 1c42f8e - [JITLink] Fix whitespace in debug dumps (NFC)
Stefan Gränitz via llvm-commits
- [llvm] 59b8db1 - [JITLink] Drop const qualifier from argument to ELFLinkGraphBuilder's ctors (NFC)
Stefan Gränitz via llvm-commits
- [PATCH] D144083: [JITLink] Initial 32-bit ARM backend
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D144083: [JITLink] Initial 32-bit ARM backend
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D144083: [JITLink] Initial 32-bit ARM backend
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D144083: [JITLink] Initial 32-bit ARM backend
Stefan Gränitz via Phabricator via llvm-commits
- [llvm] 2e47aaf - [PowerPC] Fix float materialization patterns.
Stefan Pintilie via llvm-commits
- [PATCH] D142120: [PowerPC] Fix float materialization patterns.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D142120: [PowerPC] Fix float materialization patterns.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D144068: [PowerPC] Add Binary Coded Decimal Assist Instructions
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D144281: Update output for timestamp with llvm-readobj on XCOFF files.
Stephen Peckham via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Sterling Augustine via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Sterling Augustine via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Sterling Augustine via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Sterling Augustine via Phabricator via llvm-commits
- [PATCH] D142254: [X86] Transform vector SET{LE/ULT/ULE} -> SETLT and SET{GE/UGT/UGE} -> SETGT if possible
Sterling Augustine via Phabricator via llvm-commits
- [PATCH] D143760: [Codeview] Fix incorrect size determination for Fortran complex types.
Steve Merritt via Phabricator via llvm-commits
- [PATCH] D143760: [Codeview] Fix incorrect size determination for Fortran complex types.
Steve Merritt via Phabricator via llvm-commits
- [PATCH] D143760: [Codeview] Fix incorrect size determination for Fortran complex types.
Steve Merritt via Phabricator via llvm-commits
- [PATCH] D143760: [Codeview] Fix incorrect size determination for complex types.
Steve Merritt via Phabricator via llvm-commits
- [PATCH] D143760: [Codeview] Fix incorrect size determination for complex types.
Steve Merritt via Phabricator via llvm-commits
- [PATCH] D143760: [Codeview] Fix incorrect size determination for complex types.
Steve Merritt via Phabricator via llvm-commits
- [PATCH] D143760: [Codeview] Fix incorrect size determination for complex types.
Steve Merritt via Phabricator via llvm-commits
- [PATCH] D142279: [cmake] Use LLVM_ENABLE_ASSERTIONS to enable assertions in libstdc++
Steven Johnson via Phabricator via llvm-commits
- [PATCH] D139097: [ARM] Add option --print-raw-value to llvm-nm to dump raw symbol values in case of ARM
Subham Kedia via Phabricator via llvm-commits
- [PATCH] D139097: [ARM] Add option --print-raw-value to llvm-nm to dump raw symbol values in case of ARM
Subham Kedia via Phabricator via llvm-commits
- [PATCH] D139097: [ARM] Add option --print-raw-value to llvm-nm to dump raw symbol values in case of ARM
Subham Kedia via Phabricator via llvm-commits
- [PATCH] D139097: [ARM] Add option --print-raw-value to llvm-nm to dump raw symbol values in case of ARM
Subham Kedia via Phabricator via llvm-commits
- [PATCH] D144276: [ORC] Introduce SetUpExecutorNativePlatform utility.
Sunho Kim via Phabricator via llvm-commits
- [PATCH] D144276: [ORC] Introduce SetUpExecutorNativePlatform utility.
Sunho Kim via Phabricator via llvm-commits
- [PATCH] D144276: [ORC] Introduce SetUpExecutorNativePlatform utility.
Sunho Kim via Phabricator via llvm-commits
- [PATCH] D143422: [LV] Update logic for calculating register usage due to invariants
Sushant Gokhale via Phabricator via llvm-commits
- [PATCH] D142656: [SVE][codegen] Add pattern for SVE multiply-add accumulate
Sushant Gokhale via Phabricator via llvm-commits
- [PATCH] D142656: [SVE][codegen] Add pattern for SVE multiply-add accumulate
Sushant Gokhale via Phabricator via llvm-commits
- [PATCH] D143422: [LV] Update logic for calculating register usage due to invariants
Sushant Gokhale via Phabricator via llvm-commits
- [PATCH] D142656: [SVE][codegen] Add pattern for SVE multiply-add accumulate
Sushant Gokhale via Phabricator via llvm-commits
- [llvm] 8045ba8 - [ThinLTO/WPD] Handle function alias in vtable correctly
Teresa Johnson via llvm-commits
- [llvm] bf0f94a - New SetOperations and unittesting for all SetOperations
Teresa Johnson via llvm-commits
- [PATCH] D143229: [FunctionImporter] Add flag to disable upgrading debug info
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D139209: [IRMover] Remove UB implying parameter attributes when necessary
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D143229: [FunctionImporter] Add flag to disable upgrading debug info
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D144209: [ThinLTO/WPD] Handle function alias in vtable correctly
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D144220: New SetOperations and unittesting for all SetOperations
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D144209: [ThinLTO/WPD] Handle function alias in vtable correctly
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D144209: [ThinLTO/WPD] Handle function alias in vtable correctly
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D144209: [ThinLTO/WPD] Handle function alias in vtable correctly
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D144220: New SetOperations and unittesting for all SetOperations
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D144220: New SetOperations and unittesting for all SetOperations
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D144270: [LTO/WPD] Allow devirtualization to function alias in vtable
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D144314: [MemProf] Add printing utilities for MemProf summary structures
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D144318: [MemProf] Make hasSingleAllocType helper non-static
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D143618: [X86] Fix for offsets of CFA directives
Theodoros Kasampalis via Phabricator via llvm-commits
- [PATCH] D143581: [WebAssembly] Additional patterns for pmin/pax
Thomas Lively via Phabricator via llvm-commits
- [PATCH] D144108: [mlir][LinAlg][Transform] Add a transform op for conv2d to im2col
Thomas Raoux via Phabricator via llvm-commits
- [PATCH] D140208: [AMDGPU] Improved wide multiplies
Thomas Symalla via Phabricator via llvm-commits
- [PATCH] D143938: [VPlan] Compute costs for plans directly after construction (WIP).
Thorsten via Phabricator via llvm-commits
- [PATCH] D144088: [IndVarSimplify] Precommit a test
Tiehu Zhang via Phabricator via llvm-commits
- [PATCH] D144089: [IndVarSimplify] Transform the trip count to a simpler form
Tiehu Zhang via Phabricator via llvm-commits
- [PATCH] D144089: [IndVarSimplify] Transform the trip count into a simpler form
Tiehu Zhang via Phabricator via llvm-commits
- [PATCH] D139209: [IRMover] Remove UB implying parameter attributes when necessary
Tim Neumann via Phabricator via llvm-commits
- [llvm] 2002c82 - AArch64: count callee stack we use when estimating scavenging requirements.
Tim Northover via llvm-commits
- [PATCH] D144168: StackProtector: instrument noreturn paths before the call
Tim Northover via Phabricator via llvm-commits
- [PATCH] D142711: AArch64: count call stack when working out if scavenging is needed
Tim Northover via Phabricator via llvm-commits
- [PATCH] D143637: StackProtector: add unwind cleanup paths for instrumentation.
Tim Northover via Phabricator via llvm-commits
- [PATCH] D144168: StackProtector: instrument noreturn paths before the call
Tim Northover via Phabricator via llvm-commits
- [llvm] 52a774f - [PowerPC] remove XXSWAPD after load from CP which is a splat value
Ting Wang via llvm-commits
- [PATCH] D139491: [PowerPC] remove XXSWAPD after load from CP which is a splat value
Ting Wang via Phabricator via llvm-commits
- [PATCH] D144235: [PowerPC][NFC] add const-splat-array-init.ll
Ting Wang via Phabricator via llvm-commits
- [PATCH] D144235: [PowerPC][NFC] add const-splat-array-init.ll
Ting Wang via Phabricator via llvm-commits
- [PATCH] D138883: [PowerPC] find and reuse ConstantSplatVector to combine constant store into extract and store
Ting Wang via Phabricator via llvm-commits
- [PATCH] D141673: [PowerPC][NFC] refactor eligible check for tail call optimization
Ting Wang via Phabricator via llvm-commits
- [PATCH] D141673: [PowerPC][NFC] refactor eligible check for tail call optimization
Ting Wang via Phabricator via llvm-commits
- [PATCH] D141673: [PowerPC][NFC] refactor eligible check for tail call optimization
Ting Wang via Phabricator via llvm-commits
- [PATCH] D143632: [clang] Handle __declspec() attributes in using
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D143632: [clang] Handle __declspec() attributes in using
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D143632: [clang] Handle __declspec() attributes in using
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D143632: [clang] Handle __declspec() attributes in using
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D143468: [CMake] Remove custom ccache CMake logic
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D143468: [CMake] Remove custom ccache CMake logic
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D143535: github: Add manual workflow to build and upload release binaries
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D143535: github: Add manual workflow to build and upload release binaries
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D143535: github: Add manual workflow to build and upload release binaries
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D143535: github: Add manual workflow to build and upload release binaries
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D140982: [HardwareLoops] NewPM support
Tom Weaver via Phabricator via llvm-commits
- [PATCH] D140982: [HardwareLoops] NewPM support
Tom Weaver via Phabricator via llvm-commits
- [llvm] 9e3010a - [AArch64] Fix LSE2/LSE128/RCPC3 precedence
Tomas Matheson via llvm-commits
- [PATCH] D143506: [AArch64] Fix LSE2/LSE128/RCPC3 precedence
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D141431: [AArch64] FEAT_LRCPC3 load/store optimisations
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Valeriy Dmitriev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Valeriy Dmitriev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Valeriy Dmitriev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Valeriy Dmitriev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Valeriy Dmitriev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Valeriy Dmitriev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Valeriy Dmitriev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Valeriy Dmitriev via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Valeriy Dmitriev via Phabricator via llvm-commits
- [PATCH] D143225: [SROA] Create additional vector type candidates based on store and load slices
Vang Thao via Phabricator via llvm-commits
- [PATCH] D143248: Emit CFI directives in epilogue and enable CFIFixup pass for RISC-V.
Varun Kumar E via Phabricator via llvm-commits
- [llvm] b64f7d0 - [NFC][IR] Make Module::getAliasList() private
Vasileios Porpodas via llvm-commits
- [llvm] 6d4a674 - Revert "[NFC][IR] Make Module::getAliasList() private"
Vasileios Porpodas via llvm-commits
- [llvm] afad153 - Recommit: [NFC][IR] Make Module::getAliasList() private
Vasileios Porpodas via llvm-commits
- [llvm] d180443 - [NFC][IR] Make Module::getIFuncList() private.
Vasileios Porpodas via llvm-commits
- [llvm] fb717fe - [NFC][IR] Make Module::getNamedMDList() private
Vasileios Porpodas via llvm-commits
- [llvm] ed3e3ee - [NFC][IR] Make Module::getGlobalList() private
Vasileios Porpodas via llvm-commits
- [llvm] cb5f239 - Revert "[NFC][IR] Make Module::getGlobalList() private"
Vasileios Porpodas via llvm-commits
- [llvm] 823186b - Recommit: [NFC][IR] Make Module::getGlobalList() private
Vasileios Porpodas via llvm-commits
- [llvm] e6fbfb1 - [NFC] Make Module::getIFuncList() private
Vasileios Porpodas via llvm-commits
- [PATCH] D141731: [NFC] Makes mutable Function::getBasicBlockList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143958: [NFC][IR] Make Module::getAliasList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143958: [NFC][IR] Make Module::getAliasList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D141731: [NFC] Makes mutable Function::getBasicBlockList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143958: [NFC][IR] Make Module::getAliasList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143968: [NFC][IR] Make Module::getIFuncList() private.
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143969: [NFC][IR] Make Module::getNamedMDList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143958: [NFC][IR] Make Module::getAliasList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143968: [NFC][IR] Make Module::getIFuncList() private.
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143968: [NFC][IR] Make Module::getIFuncList() private.
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143968: [NFC][IR] Make Module::getIFuncList() private.
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143969: [NFC][IR] Make Module::getNamedMDList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D144027: [NFC][IR] Make Module::getGlobalList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D144027: [NFC][IR] Make Module::getGlobalList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D144027: [NFC][IR] Make Module::getGlobalList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143969: [NFC][IR] Make Module::getNamedMDList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D144027: [NFC][IR] Make Module::getGlobalList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D144040: [NFC][IR] Force accesses to Function attributes go through getters/setters
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D144040: [NFC][IR] Force accesses to Function attributes go through getters/setters
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D144040: [NFC][IR] Force accesses to Function attributes go through getters/setters
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D144027: [NFC][IR] Make Module::getGlobalList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D144027: [NFC][IR] Make Module::getGlobalList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143968: [NFC][IR] Make Module::getIFuncList() private.
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D144127: [NFC] Make Module::getIFuncList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D144127: [NFC] Make Module::getIFuncList() private
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D143645: [llvm] Fix MCSubtargetInfo::checkFeatures to handle unknown features correctly
Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
- [PATCH] D143987: [AMDGPU] Autogenerate carryout-selection.ll, uaddo.ll, usubo.ll (NFC)
Vikram Hegde via Phabricator via llvm-commits
- [PATCH] D142916: [lld-macho] Warn on method name collisions from category definitions
Vincent Lee via Phabricator via llvm-commits
- [llvm] 890146b - [WebAssembly] Initial support for reference type externref in clang
Vitaly Buka via llvm-commits
- [llvm] c23f29d - Revert "[SimplifyCFG] Check if the return instruction causes undefined behavior"
Vitaly Buka via llvm-commits
- [llvm] a53d940 - [SCEV] Fix FoldID::addInteger(unsigned long I)
Vitaly Buka via llvm-commits
- [compiler-rt] 3a3ce59 - [sanitizers] Update global_symbols.txt
Vitaly Buka via llvm-commits
- [PATCH] D65857: [MC][AArch64] Restrict use of signed relocation operators on MOV[NZK]
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D144316: [SCEV] Fix FoldID::addInteger(unsigned long I)
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D122215: [WebAssembly] Initial support for reference type externref in clang
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D122215: [WebAssembly] Initial support for reference type externref in clang
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D144316: [SCEV] Fix FoldID::addInteger(unsigned long I)
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D144316: [SCEV] Fix FoldID::addInteger(unsigned long I)
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D144335: [SCEV] Optimize FoldID
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D144335: [SCEV] Optimize FoldID
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D144335: [SCEV] Optimize FoldID
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D144335: [SCEV] Optimize FoldID
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D143708: [RISCV] Add emulated TLS supported
Vitaly Cheptsov via Phabricator via llvm-commits
- [PATCH] D143748: [BOLT] Improve dynamic relocations support for CI
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D143748: [BOLT] Improve dynamic relocations support for CI
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D144095: [BOLT] Fix data reoder for aarch64
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D143390: [BOLT] Add writable segment for allocatable sections
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D143390: [BOLT] Add writable segment for allocatable sections
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D143390: [BOLT] Add writable segment for allocatable sections
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D144095: [BOLT] Fix data reoder for aarch64
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D142916: [lld-macho] Warn on method name collisions from category definitions
Vy Nguyen via Phabricator via llvm-commits
- [llvm] dcf9c60 - [LoongArch] Add baseline tests for `addu16i.d` codegen. NFC
Weining Lu via llvm-commits
- [llvm] 2b8cb7d - [LoongArch] Make use of addu16i.d for adds with suitable immediates
Weining Lu via llvm-commits
- [PATCH] D143948: [loop unroll] Fix `branch-weights` for unrolled loop.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D144066: [Pseudo probe] Duplicate probes in vectorized loop body.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D144066: [Pseudo probe] Duplicate probes in vectorized loop body.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D144066: [Pseudo probe] Duplicate probes in vectorized loop body.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D144053: [LICM] Ensure LICM can hoist invariant.group
William Moses via Phabricator via llvm-commits
- [PATCH] D144053: [LICM] Ensure LICM can hoist invariant.group
William Moses via Phabricator via llvm-commits
- [PATCH] D144053: [LICM] Ensure LICM can hoist invariant.group
William Moses via Phabricator via llvm-commits
- [PATCH] D144053: [LICM] Ensure LICM can hoist invariant.group
William Moses via Phabricator via llvm-commits
- [PATCH] D144053: [LICM] Ensure LICM can hoist invariant.group
William Moses via Phabricator via llvm-commits
- [PATCH] D144053: [LICM] Ensure LICM can hoist invariant.group
William Moses via Phabricator via llvm-commits
- [llvm] 776b749 - [TLS] Added a LangRef entry wrt the module flag MaxTLSAlign.
Wolfgang Pieb via llvm-commits
- [PATCH] D140123: [TLS] Clamp the alignment of TLS global variables if required by the target
Wolfgang Pieb via Phabricator via llvm-commits
- [PATCH] D140123: [TLS] Clamp the alignment of TLS global variables if required by the target
Wolfgang Pieb via Phabricator via llvm-commits
- [PATCH] D143880: [LoongArch] Emit bytepick for picking from concatenation of two values
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D143880: [LoongArch] Emit bytepick for picking from concatenation of two values
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D138135: [lld][ELF] Support LoongArch
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D143880: [LoongArch] Emit bytepick for picking from concatenation of two values
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D141785: [Clang][LoongArch] Implement patchable function entry
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D141785: [Clang][LoongArch] Implement patchable function entry
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D143880: [LoongArch] Emit bytepick for picking from concatenation of two values
Xi Ruoyao via Phabricator via llvm-commits
- [PATCH] D143854: [DirectX backend] remove string function attribute and unused module flags
Xiang Li via Phabricator via llvm-commits
- [PATCH] D143854: [DirectX backend] remove string function attribute and unused module flags
Xiang Li via Phabricator via llvm-commits
- [PATCH] D144163: [X86] Support load/store for bf16 vector in avx
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D144163: [X86] Support load/store for bf16 vector in avx
Xiang Zhang via Phabricator via llvm-commits
- [llvm] 96df79a - [X86] Support load/store for bf16 in avx
Xiang1 Zhang via llvm-commits
- [PATCH] D143976: [ADT] Add lookupOrTrap method to DenseMap
Xiangxi Guo (Ryan) via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add lookupOrTrap method to DenseMap
Xiangxi Guo (Ryan) via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add lookupOrTrap method to DenseMap and StringMap
Xiangxi Guo (Ryan) via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add lookupOrTrap method to DenseMap and StringMap
Xiangxi Guo (Ryan) via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add lookupOrTrap method to DenseMap and StringMap
Xiangxi Guo (Ryan) via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add lookupOrTrap method to DenseMap and StringMap
Xiangxi Guo (Ryan) via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add `at` method (assertive lookup) to DenseMap and StringMap
Xiangxi Guo (Ryan) via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add `at` method (assertive lookup) to DenseMap and StringMap
Xiangxi Guo (Ryan) via Phabricator via llvm-commits
- [PATCH] D143976: [ADT] Add `at` method (assertive lookup) to DenseMap and StringMap
Xiangxi Guo (Ryan) via Phabricator via llvm-commits
- [PATCH] D143908: [RISCV] edit document of Zcb to match the Implementation
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D143908: [RISCV] edit document of Zcb to match the Implementation
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D132819: [RISCV] Add MC support of RISCV zcmp Extension
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D132819: [RISCV] Add MC support of RISCV zcmp Extension
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D133863: [RISCV] Add MC support of RISCV zcmt Extension
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D134599: [RISCV] Add CodeGen support of RISCV zcmp Extension
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D144070: [llvm-uniformity-analysis] Fix usesValueFromCycle
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D144070: [llvm][GenericUniformity] Prevent assert while calculating temporal divergence
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D144070: [llvm][GenericUniformity] Prevent assert while calculating temporal divergence
Yashwant Singh via Phabricator via llvm-commits
- [llvm] a96cbeb - [DAGCombiner] Teach MatchContextClass classes to use TargetLowering::isOperationLegalOrCustom().
Yeting Kuo via llvm-commits
- [PATCH] D144075: [DAGCombiner] Teach MatchContextClass classes to use TargetLowering::isOperationLegalOrCustom().
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D144075: [DAGCombiner] Teach MatchContextClass classes to use TargetLowering::isOperationLegalOrCustom().
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D144075: [DAGCombiner] Teach MatchContextClass classes to use TargetLowering::isOperationLegalOrCustom().
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D141650: [VectorUtils] Enhance VFABI demangling API
Yilong Guo via Phabricator via llvm-commits
- [PATCH] D143439: [RISCV] Add vendor-defined XTheadBb (basic bit-manipulation) extension
Yingchi Long via Phabricator via llvm-commits
- [PATCH] D143439: [RISCV] Add vendor-defined XTheadBb (basic bit-manipulation) extension
Yingchi Long via Phabricator via llvm-commits
- [llvm] 869c87a - [ConstraintElimination] Change debug output to display variable names.
Zain Jaffal via llvm-commits
- [llvm] 62d0e1a - Revert "[ConstraintElimination] Change debug output to display variable names."
Zain Jaffal via llvm-commits
- [llvm] 2a2a6bf - Recommit "[ConstraintElimination] Change debug output to display variable names."
Zain Jaffal via llvm-commits
- [llvm] 07f93d8 - Recommit "[ConstraintElimination] Change debug output to display variable names."
Zain Jaffal via llvm-commits
- [llvm] df2ea2f - [ConstriantElimination] Add NODEBUG condition around `dump`
Zain Jaffal via llvm-commits
- [PATCH] D142618: [ConstraintElimination] Change debug output to display variable names.
Zain Jaffal via Phabricator via llvm-commits
- [PATCH] D142618: [ConstraintElimination] Change debug output to display variable names.
Zain Jaffal via Phabricator via llvm-commits
- [PATCH] D142751: Incorrect early exit in updatePredecessorProfileMetadata
Zhi Zhuang via Phabricator via llvm-commits
- [PATCH] D143916: [runtimes] Set LLVM_ENABLE_PER_TARGET_RUNTIME_DIR_default to ON for OS390
Zibi Sarbino via Phabricator via llvm-commits
- [PATCH] D143373: [InstCombine] fold icmp of the sum of ext bool based on limited range
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D143373: [InstCombine] fold icmp of the sum of ext bool based on limited range
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D143373: [InstCombine] fold icmp of the sum of ext bool based on limited range
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D144071: [ComplexLogicCombine] test result for all tests on the transform
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D143046: [ComplexLogicCombine 2/?] Add weight into node then use it to determine if we can combine the case need to create new Value.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D143155: [ComplexLogicCombine 3/?] Add i1 select instruction support
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D144077: [ComplexLogicCombine 4/?] Support combine xor chain with 2 elements
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D144077: [ComplexLogicCombine 4/?] Support combine xor chain with 2 elements
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D111862: [AArch64] Canonicalize X*(Y+1) or X*(1-Y) to madd/msub
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D142803: [ComplexLogicCombine 1/?] Implement a general way to simplify complex logical operations.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D143046: [ComplexLogicCombine 2/?] Add weight into node then use it to determine if we can combine the case need to create new Value.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D143155: [ComplexLogicCombine 3/?] Add i1 select instruction support
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D143046: [ComplexLogicCombine 2/?] Add weight into node then use it to determine if we can combine the case need to create new Value.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D143155: [ComplexLogicCombine 3/?] Add i1 select instruction support
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D143155: [ComplexLogicCombine 3/?] Add i1 select instruction support
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D143283: [AArch64][SVE]: custom lower AVGFloor/AVGCeil. [WIP]
hassnaaHamdi via Phabricator via llvm-commits
- [PATCH] D143283: [AArch64][SVE]: custom lower AVGFloor/AVGCeil. [WIP]
hassnaaHamdi via Phabricator via llvm-commits
- [PATCH] D143283: [AArch64][SVE]: custom lower AVGFloor/AVGCeil. [WIP]
hassnaaHamdi via Phabricator via llvm-commits
- [PATCH] D143793: Add the ability to segment GSYM files.
jeffrey tan via Phabricator via llvm-commits
- [PATCH] D138637: [InstCombine] Combine opaque pointer single index GEP and with src GEP by matching the types
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D143335: [AMDGPU] Use instruction order in machine function to process workList of moveToVALU
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D143641: [MemorySSA] Iteratively check if gep's pointer operand is a guaranteed loop invariant
luxufan via Phabricator via llvm-commits
- [PATCH] D143641: [MemorySSA] Iteratively check if gep's pointer operand is a guaranteed loop invariant
luxufan via Phabricator via llvm-commits
- [PATCH] D144053: [LICM] Ensure LICM can hoist invariant.group
luxufan via Phabricator via llvm-commits
- [PATCH] D144298: [Local][SimplifyCFG] Handle !nontemporal in combineMetadata
luxufan via Phabricator via llvm-commits
- [PATCH] D143809: [Release] Produce bolt tarball
ptr1337 via Phabricator via llvm-commits
- [PATCH] D144020: [lld] Estimate think slope size instead of using a magic constant
serge via Phabricator via llvm-commits
- [PATCH] D144029: [lld-macho] Account for alignment in thunk insertion algorithm
serge via Phabricator via llvm-commits
- [PATCH] D144020: [lld] Estimate think slope size instead of using a magic constant
serge via Phabricator via llvm-commits
- [PATCH] D137707: Move "auto-init" instructions to the dominator of their users
serge via Phabricator via llvm-commits
- [PATCH] D137707: Move "auto-init" instructions to the dominator of their users
serge via Phabricator via llvm-commits
- [PATCH] D144337: Prevent line 0 instructions from dividing a lexical block into ranges
ykhatav via Phabricator via llvm-commits
- [llvm] 5a5f3de - [RISCV] edit document of Zcb to match the Implementation
via llvm-commits
- [llvm] 04f6934 - [DAG] Handle build_vector with all undefs in reduceBuildVecTruncToBitCast
via llvm-commits
- [llvm] a52432f - [NFC][SeparateConstOffsetFromGEP] Added flag `lower-gep`
via llvm-commits
- [llvm] f93da39 - [Instcombine] Precommit tests for icmp range; NFC
via llvm-commits
- [llvm] 06f0664 - [SeparateConstOffsetFromGEP] Fix: `b - a` matched `a - b` during reuniteExts
via llvm-commits
- [llvm] dd31a3b - [InstCombine] fold icmp of the sum of ext bool based on limited range
via llvm-commits
- [llvm] 2738dc0 - [ComplexLogicCombine] Precommit tests for complex logic combine init patch; NFC
via llvm-commits
- [llvm] b531192 - [Doc] Fix type-o under LangRef
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- [llvm] 7be55b0 - [SimplifyCFG] Check if the return instruction causes undefined behavior
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- [llvm] b6eed9a - [SimplifyCFG] Check if the return instruction causes undefined behavior
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- [llvm] 1235ed9 - Revert "[SimplifyCFG] Check if the return instruction causes undefined behavior"
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Last message date:
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Archived on: Sun Feb 19 23:57:31 PST 2023
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