[PATCH] D144166: [RISCV] For rv32, accept constants like 0xfffff800 as a valid simm12.

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

Basic idea makes complete sense to me.  One question on implementation.



================
Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:772
+    return IsConstantImm &&
+           isInt<5>(fixImmediateForRV32(Imm, isRV64Imm()) - 1) &&
            VK == RISCVMCExpr::VK_RISCV_None;
----------------
Is this checking the right thing?  It seems like maybe we want to allow the 32 bit form on the Imm -1, not the Imm.  Main case I'm thinking of is what if imm is smin<5> and thus smin<5>-1 is not an int<5>.  

Alternatively said, please check what gcc does and make sure our behavior matches in the edge case.  


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  https://reviews.llvm.org/D144166/new/

https://reviews.llvm.org/D144166