[PATCH] D144143: [RISCV] Improve isInterleaveShuffle to handle interleaving the high half and low half of the same source.

[Philip Reames via Phabricator via llvm-commits]

reames added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:3360
+    SDValue EvenV, OddV;
+    if (EvenSrc >= 0) {
+      EvenV = (EvenSrc / Size) == 0 ? V1 : V2;
----------------
I don't understand this if condition.  It looks like you're leaving EvenV unset for the low element of the vector.  That probably can't be right (as your tests cover that case), but there's something I'm missing here.  

Ah, I think I see what's going on here.  You're trying to handle undef vectors (i.e. we never matched the other polarity).  I think this is dead code in the current patch, and these should be probably be asserts.  


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Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll:422
+; V512-NEXT:    ret
+  %a = shufflevector <4 x half> %x, <4 x half> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
+  ret <4 x half> %a
----------------
>From the test name, I'd expect these to be float not half.  Did you forget to update the test?


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Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll:449
+; V512-NEXT:    ret
+  %a = shufflevector <4 x half> %x, <4 x half> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
+  ret <4 x half> %a
----------------
Same here.


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Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll:479
+
+define <8 x half> @unary_interleave_v8f32(<8 x half> %x) {
+; V128-LABEL: unary_interleave_v8f32:
----------------
Same here


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D144143/new/

https://reviews.llvm.org/D144143