[PATCH] D143838: [X86] Improve (select carry C1+1 C1)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:50105
+                                     SelectionDAG &DAG) {
+  // Delegate to combineAddOrSubToADCOrSBB if we have:
+  //
----------------
assert((N->getOpcode() == ISD::OR || N->getOpcode() == ISD::XOR) && "Unexpected opcode");


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:50114
+      N0.hasOneUse()) {
+    if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
+      bool IsSub = N->getOpcode() == ISD::XOR;
----------------
auto *N1C


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143838/new/

https://reviews.llvm.org/D143838