[PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb
Philipp Tomsich via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 17 11:17:40 PST 2023
philipp.tomsich updated this revision to Diff 498457.
philipp.tomsich marked an inline comment as done.
philipp.tomsich added a comment.
- reject recognition of bitfield-extract if (shr (shl X c1) c2) has c1 > c2, which would leave the extracted bitfield at a bitposition > 0 (and turn the LSB negative...)
- add test-coverage for this case
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D144229/new/
https://reviews.llvm.org/D144229
Files:
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
llvm/test/CodeGen/RISCV/bitextract-mac.ll
llvm/test/CodeGen/RISCV/rotl-rotr.ll
llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
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