[llvm] 4a05edd - [llvm] Use APInt::getZero instead of APInt::getNullValue (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 19 22:42:09 PST 2023
Author: Kazu Hirata
Date: 2023-02-19T22:42:01-08:00
New Revision: 4a05edd410a42cffc4be574d1fcc5c345db204e8
URL: https://github.com/llvm/llvm-project/commit/4a05edd410a42cffc4be574d1fcc5c345db204e8
DIFF: https://github.com/llvm/llvm-project/commit/4a05edd410a42cffc4be574d1fcc5c345db204e8.diff
LOG: [llvm] Use APInt::getZero instead of APInt::getNullValue (NFC)
Note that APInt::getNullValue has been soft-deprecated in favor of
APInt::getZero.
Added:
Modified:
llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
index 480be9f723f23..cc57defb063de 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -1213,7 +1213,7 @@ class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
int ReplicationFactor, VF;
if (Shuffle->isReplicationMask(ReplicationFactor, VF)) {
APInt DemandedDstElts =
- APInt::getNullValue(Shuffle->getShuffleMask().size());
+ APInt::getZero(Shuffle->getShuffleMask().size());
for (auto I : enumerate(Shuffle->getShuffleMask())) {
if (I.value() != UndefMaskElem)
DemandedDstElts.setBit(I.index());
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index e5dba3e757f7b..ba037998aaf1b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -24588,8 +24588,8 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
bool IsInLaneMask = true;
ArrayRef<int> Mask = SVN->getMask();
SmallVector<int, 16> ClearMask(NumElts, -1);
- APInt DemandedLHS = APInt::getNullValue(NumElts);
- APInt DemandedRHS = APInt::getNullValue(NumElts);
+ APInt DemandedLHS = APInt::getZero(NumElts);
+ APInt DemandedRHS = APInt::getZero(NumElts);
for (int I = 0; I != (int)NumElts; ++I) {
int M = Mask[I];
if (M < 0)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 1e777aee0b81f..1018cb8cdb634 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2592,7 +2592,7 @@ APInt SelectionDAG::computeVectorKnownZeroElements(SDValue Op,
unsigned NumElts = VT.getVectorNumElements();
assert(DemandedElts.getBitWidth() == NumElts && "Unexpected demanded mask.");
- APInt KnownZeroElements = APInt::getNullValue(NumElts);
+ APInt KnownZeroElements = APInt::getZero(NumElts);
for (unsigned EltIdx = 0; EltIdx != NumElts; ++EltIdx) {
if (!DemandedElts[EltIdx])
continue; // Don't query elements that are not demanded.
@@ -2686,8 +2686,8 @@ bool SelectionDAG::isSplatValue(SDValue V, const APInt &DemandedElts,
}
case ISD::VECTOR_SHUFFLE: {
// Check if this is a shuffle node doing a splat or a shuffle of a splat.
- APInt DemandedLHS = APInt::getNullValue(NumElts);
- APInt DemandedRHS = APInt::getNullValue(NumElts);
+ APInt DemandedLHS = APInt::getZero(NumElts);
+ APInt DemandedRHS = APInt::getZero(NumElts);
ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(V)->getMask();
for (int i = 0; i != (int)NumElts; ++i) {
int M = Mask[i];
@@ -11951,7 +11951,7 @@ bool BuildVectorSDNode::getConstantRawBits(
// Extract raw src bits.
SmallVector<APInt> SrcBitElements(NumSrcOps,
- APInt::getNullValue(SrcEltSizeInBits));
+ APInt::getZero(SrcEltSizeInBits));
BitVector SrcUndeElements(NumSrcOps, false);
for (unsigned I = 0; I != NumSrcOps; ++I) {
@@ -11989,7 +11989,7 @@ void BuildVectorSDNode::recastRawBits(bool IsLittleEndian,
unsigned NumDstOps = (NumSrcOps * SrcEltSizeInBits) / DstEltSizeInBits;
DstUndefElements.clear();
DstUndefElements.resize(NumDstOps, false);
- DstBitElements.assign(NumDstOps, APInt::getNullValue(DstEltSizeInBits));
+ DstBitElements.assign(NumDstOps, APInt::getZero(DstEltSizeInBits));
// Concatenate src elements constant bits together into dst element.
if (SrcEltSizeInBits <= DstEltSizeInBits) {
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
index 3eb4e5e2c6fcc..0e18a724dd936 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
@@ -419,7 +419,7 @@ void SIMCCodeEmitter::getSOPPBrEncoding(const MCInst &MI, unsigned OpNo,
const MCExpr *Expr = MO.getExpr();
MCFixupKind Kind = (MCFixupKind)AMDGPU::fixup_si_sopp_br;
Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
- Op = APInt::getNullValue(96);
+ Op = APInt::getZero(96);
} else {
getMachineOpValue(MI, MO, Op, Fixups, STI);
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 92481ba6c7a7d..33db66c1bba94 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -7440,7 +7440,7 @@ static bool getTargetConstantBitsFromNode(SDValue Op, unsigned EltSizeInBits,
SmallVector<APInt> SrcEltBits;
unsigned SrcEltSizeInBits = VT.getScalarSizeInBits();
if (BV->getConstantRawBits(true, SrcEltSizeInBits, SrcEltBits, Undefs)) {
- APInt UndefSrcElts = APInt::getNullValue(SrcEltBits.size());
+ APInt UndefSrcElts = APInt::getZero(SrcEltBits.size());
for (unsigned I = 0, E = SrcEltBits.size(); I != E; ++I)
if (Undefs[I])
UndefSrcElts.setBit(I);
@@ -12100,8 +12100,8 @@ static bool isTargetShuffleEquivalent(MVT VT, ArrayRef<int> Mask,
if (V2 && V2.getValueSizeInBits() != VT.getSizeInBits())
V2 = SDValue();
- APInt ZeroV1 = APInt::getNullValue(Size);
- APInt ZeroV2 = APInt::getNullValue(Size);
+ APInt ZeroV1 = APInt::getZero(Size);
+ APInt ZeroV2 = APInt::getZero(Size);
for (int i = 0; i < Size; ++i) {
int MaskIdx = Mask[i];
@@ -40279,7 +40279,7 @@ static SDValue combineX86ShufflesRecursively(
OpInputs.assign({SrcVec});
OpMask.assign(NumElts, SM_SentinelUndef);
std::iota(OpMask.begin(), OpMask.end(), ExtractIdx);
- OpZero = OpUndef = APInt::getNullValue(NumElts);
+ OpZero = OpUndef = APInt::getZero(NumElts);
} else {
return SDValue();
}
@@ -43471,7 +43471,7 @@ bool X86TargetLowering::isSplatValueForTargetNode(SDValue Op,
switch (Opc) {
case X86ISD::VBROADCAST:
case X86ISD::VBROADCAST_LOAD:
- UndefElts = APInt::getNullValue(NumElts);
+ UndefElts = APInt::getZero(NumElts);
return true;
}
@@ -55946,7 +55946,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
// Attempt to fold target constant loads.
if (all_of(Ops, [](SDValue Op) { return getTargetConstantFromNode(Op); })) {
SmallVector<APInt> EltBits;
- APInt UndefElts = APInt::getNullValue(VT.getVectorNumElements());
+ APInt UndefElts = APInt::getZero(VT.getVectorNumElements());
for (unsigned I = 0, E = Ops.size(); I != E; ++I) {
APInt OpUndefElts;
SmallVector<APInt> OpEltBits;
diff --git a/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp b/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
index 856a8fd28d902..a6293ee671237 100644
--- a/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
+++ b/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
@@ -698,7 +698,7 @@ enum class Domain { NonNegative, NonPositive, Unknown };
static Domain getDomain(const ConstantRange &CR) {
if (CR.isAllNonNegative())
return Domain::NonNegative;
- if (CR.icmp(ICmpInst::ICMP_SLE, APInt::getNullValue(CR.getBitWidth())))
+ if (CR.icmp(ICmpInst::ICMP_SLE, APInt::getZero(CR.getBitWidth())))
return Domain::NonPositive;
return Domain::Unknown;
}
diff --git a/mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp b/mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
index 78e63a595e800..8f3bad745d3cf 100644
--- a/mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
+++ b/mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
@@ -176,7 +176,7 @@ static Attribute minMaxValueForSignedInt(Type type, bool min) {
static Attribute minMaxValueForUnsignedInt(Type type, bool min) {
auto intType = type.cast<IntegerType>();
unsigned bitwidth = intType.getWidth();
- return IntegerAttr::get(type, min ? llvm::APInt::getNullValue(bitwidth)
+ return IntegerAttr::get(type, min ? llvm::APInt::getZero(bitwidth)
: llvm::APInt::getAllOnesValue(bitwidth));
}
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