[llvm] 5dde2bc - [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
Kristina Bessonova via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 18 08:32:02 PST 2023
Author: Kristina Bessonova
Date: 2023-02-18T18:31:21+02:00
New Revision: 5dde2bcdd172f4650e9f5ff31b338d948c69c6c0
URL: https://github.com/llvm/llvm-project/commit/5dde2bcdd172f4650e9f5ff31b338d948c69c6c0
DIFF: https://github.com/llvm/llvm-project/commit/5dde2bcdd172f4650e9f5ff31b338d948c69c6c0.diff
LOG: [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
This is similar to ADRP and matches GNU objdump:
GNU objdump:
```
0000000000200100 <_start>:
200100: adr x0, 201000 <_start+0xf00>
```
llvm-objdump (before patch):
```
0000000000200100 <_start>:
200100: adr x0, #3840
```
llvm-objdump (after patch):
```
0000000000200100 <_start>:
200100: adr x0, 0x201000 <_start+0xf00>
```
Reviewed By: simon_tatham, peter.smith
Differential Revision: https://reviews.llvm.org/D144079
Added:
Modified:
lld/test/COFF/arm64-relocs-imports.test
lld/test/ELF/aarch64-copy.s
lld/test/ELF/aarch64-relocs.s
lld/test/ELF/aarch64-undefined-weak.s
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
llvm/test/MC/AArch64/adr.s
llvm/test/MC/AArch64/coff-relocations.s
llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test
llvm/test/tools/llvm-objdump/ELF/AArch64/pcrel-address.yaml
Removed:
################################################################################
diff --git a/lld/test/COFF/arm64-relocs-imports.test b/lld/test/COFF/arm64-relocs-imports.test
index d858959b00fb..da2fd1f941d8 100644
--- a/lld/test/COFF/arm64-relocs-imports.test
+++ b/lld/test/COFF/arm64-relocs-imports.test
@@ -43,7 +43,7 @@
# BEFORE: 84: 91400000 add x0, x0, #0, lsl #12
# BEFORE: 88: f9400000 ldr x0, [x0]
# BEFORE: 8c: 00000001 udf #1
-# BEFORE: 90: 30091a20 adr x0, #74565
+# BEFORE: 90: 30091a20 adr x0, 0x123d5
# BEFORE: 94: 54000001 b.ne 0x94
# BEFORE: 98: 36000000 tbz w0, #0, 0x98
# BEFORE: 9c: 00000001 udf #1
@@ -87,7 +87,7 @@
# AFTER: 140001084: 91400400 add x0, x0, #1, lsl #12
# AFTER: 140001088: f941c400 ldr x0, [x0, #904]
# AFTER: 14000108c: 00000003 udf #3
-# AFTER: 140001090: 300995e0 adr x0, #78525
+# AFTER: 140001090: 300995e0 adr x0, 0x14001434d
# AFTER: 140001094: 54000081 b.ne 0x1400010a4
# AFTER: 140001098: 36000060 tbz w0, #0, 0x1400010a4
# AFTER: 14000109c: ffffff61 <unknown>
diff --git a/lld/test/ELF/aarch64-copy.s b/lld/test/ELF/aarch64-copy.s
index a135a1aee51c..0f17c4c853fb 100644
--- a/lld/test/ELF/aarch64-copy.s
+++ b/lld/test/ELF/aarch64-copy.s
@@ -65,7 +65,7 @@ _start:
// CODE-EMPTY:
// CODE-NEXT: <_start>:
// S + A - P = 0x2303f0 + 0 - 0x21031c = 131284
-// CODE-NEXT: 21031c: adr x1, #131284
+// CODE-NEXT: 21031c: adr x1, 0x2303f0
// Page(S + A) - Page(P) = Page(0x230400) - Page(0x210320) = 131072
// CODE-NEXT: 210320: adrp x2, 0x230000
// (S + A) & 0xFFF = (0x230400 + 0) & 0xFFF = 1024
diff --git a/lld/test/ELF/aarch64-relocs.s b/lld/test/ELF/aarch64-relocs.s
index d2c2cb7ae631..9d2b81f0fe25 100644
--- a/lld/test/ELF/aarch64-relocs.s
+++ b/lld/test/ELF/aarch64-relocs.s
@@ -14,7 +14,7 @@ msgend:
# CHECK: Disassembly of section .R_AARCH64_ADR_PREL_LO21:
# CHECK-EMPTY:
# CHECK: <_start>:
-# CHECK: 0: 10000021 adr x1, #4
+# CHECK: 0: 10000021 adr x1, 0x210124
# CHECK: <msg>:
# CHECK: 4:
# #4 is the adr immediate value.
diff --git a/lld/test/ELF/aarch64-undefined-weak.s b/lld/test/ELF/aarch64-undefined-weak.s
index f9c8edbf73db..f4628453ec3f 100644
--- a/lld/test/ELF/aarch64-undefined-weak.s
+++ b/lld/test/ELF/aarch64-undefined-weak.s
@@ -49,7 +49,7 @@ bl_undefweak2:
// CHECK-NEXT: 10010124: bl 0x10010128
// CHECK-NEXT: 10010128: b.eq 0x1001012c
// CHECK-NEXT: 1001012c: cbz x1, 0x10010130
-// CHECK-NEXT: 10010130: adr x0, #0
+// CHECK-NEXT: 10010130: adr x0, 0x10010130
// CHECK-NEXT: 10010134: adrp x0, 0x10010000
// CHECK-NEXT: 10010138: ldr x8, 0x10010138
// CHECK: 1001013c: 00 00 00 00 .word 0x00000000
diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
index 91179aa8046e..0d22a2c62364 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -285,7 +285,7 @@ def AdrpOperand : AsmOperandClass {
}
def adrplabel : Operand<i64> {
let EncoderMethod = "getAdrLabelOpValue";
- let PrintMethod = "printAdrpLabel";
+ let PrintMethod = "printAdrAdrpLabel";
let ParserMatchClass = AdrpOperand;
let OperandType = "OPERAND_PCREL";
}
@@ -297,7 +297,9 @@ def AdrOperand : AsmOperandClass {
}
def adrlabel : Operand<i64> {
let EncoderMethod = "getAdrLabelOpValue";
+ let PrintMethod = "printAdrAdrpLabel";
let ParserMatchClass = AdrOperand;
+ let OperandType = "OPERAND_PCREL";
}
class SImmOperand<int width> : AsmOperandClass {
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
index 088e1a626663..7c32c6f7361f 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
@@ -1772,19 +1772,23 @@ void AArch64InstPrinter::printAlignedLabel(const MCInst *MI, uint64_t Address,
}
}
-void AArch64InstPrinter::printAdrpLabel(const MCInst *MI, uint64_t Address,
- unsigned OpNum,
- const MCSubtargetInfo &STI,
- raw_ostream &O) {
+void AArch64InstPrinter::printAdrAdrpLabel(const MCInst *MI, uint64_t Address,
+ unsigned OpNum,
+ const MCSubtargetInfo &STI,
+ raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNum);
// If the label has already been resolved to an immediate offset (say, when
// we're running the disassembler), just print the immediate.
if (Op.isImm()) {
- const int64_t Offset = Op.getImm() * 4096;
+ int64_t Offset = Op.getImm();
+ if (MI->getOpcode() == AArch64::ADRP) {
+ Offset = Offset * 4096;
+ Address = Address & -4096;
+ }
O << markup("<imm:");
if (PrintBranchImmAsAddress)
- O << formatHex((Address & -4096) + Offset);
+ O << formatHex(Address + Offset);
else
O << "#" << Offset;
O << markup(">");
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
index 1baf7e42c35c..fcaa57402bc2 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
@@ -174,8 +174,8 @@ class AArch64InstPrinter : public MCInstPrinter {
const MCSubtargetInfo &STI, raw_ostream &O);
void printMatrixIndex(const MCInst *MI, unsigned OpNum,
const MCSubtargetInfo &STI, raw_ostream &O);
- void printAdrpLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
- const MCSubtargetInfo &STI, raw_ostream &O);
+ void printAdrAdrpLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
+ const MCSubtargetInfo &STI, raw_ostream &O);
void printBarrierOption(const MCInst *MI, unsigned OpNum,
const MCSubtargetInfo &STI, raw_ostream &O);
void printBarriernXSOption(const MCInst *MI, unsigned OpNum,
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
index 8b61ebcfea0e..05a6f8182fe2 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
@@ -413,7 +413,9 @@ class AArch64MCInstrAnalysis : public MCInstrAnalysis {
for (unsigned i = 0, e = Inst.getNumOperands(); i != e; i++) {
if (Desc.operands()[i].OperandType == MCOI::OPERAND_PCREL) {
int64_t Imm = Inst.getOperand(i).getImm();
- if (Inst.getOpcode() == AArch64::ADRP)
+ if (Inst.getOpcode() == AArch64::ADR)
+ Target = Addr + Imm;
+ else if (Inst.getOpcode() == AArch64::ADRP)
Target = (Addr & -4096) + Imm * 4096;
else
Target = Addr + Imm * 4;
diff --git a/llvm/test/MC/AArch64/adr.s b/llvm/test/MC/AArch64/adr.s
index f723117271bb..c2ddc8fcb38b 100644
--- a/llvm/test/MC/AArch64/adr.s
+++ b/llvm/test/MC/AArch64/adr.s
@@ -1,15 +1,15 @@
// RUN: llvm-mc -triple aarch64-elf -filetype=obj %s -o - | llvm-objdump --no-print-imm-hex -d -r - | FileCheck %s
-// CHECK: adr x0, #100
-// CHECK-NEXT: adr x2, #0
+// CHECK: adr x0, 0x64
+// CHECK-NEXT: adr x2, 0x4
// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol
-// CHECK-NEXT: adr x3, #0
+// CHECK-NEXT: adr x3, 0x8
// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol
-// CHECK-NEXT: adr x4, #0
+// CHECK-NEXT: adr x4, 0xc
// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+0xf1000
-// CHECK-NEXT: adr x5, #0
+// CHECK-NEXT: adr x5, 0x10
// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+0xf1000
-// CHECK-NEXT: adr x6, #0
+// CHECK-NEXT: adr x6, 0x14
// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+0xf1000
adr x0, 100
diff --git a/llvm/test/MC/AArch64/coff-relocations.s b/llvm/test/MC/AArch64/coff-relocations.s
index 2567351d1976..fb67a21992c6 100644
--- a/llvm/test/MC/AArch64/coff-relocations.s
+++ b/llvm/test/MC/AArch64/coff-relocations.s
@@ -111,7 +111,7 @@ tbz x0, #0, target
// DISASM: 40: 91000000 add x0, x0, #0
// DISASM: 44: 91400000 add x0, x0, #0, lsl #12
// DISASM: 48: f9400000 ldr x0, [x0]
-// DISASM: 4c: 30091a20 adr x0, #74565
+// DISASM: 4c: 30091a20 adr x0, 0x12391
// DATA: Contents of section .rdata:
// DATA-NEXT: 0000 30000000 08000000
diff --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test b/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test
index 93365e5207c4..965b09d4e5f1 100644
--- a/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test
+++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test
@@ -17,7 +17,7 @@ mystr:
# CHECK: Disassembly of section .mysection:
# CHECK: <_start>:
-# CHECK: 0: 10000021 adr x1, #4
+# CHECK: 0: 10000021 adr x1, 0x4
# CHECK: <msg>:
# CHECK: 4: 48 65 6c 6c .word
# CHECK: 8: 6f 2c 20 77 .word
diff --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/pcrel-address.yaml b/llvm/test/tools/llvm-objdump/ELF/AArch64/pcrel-address.yaml
index 483274fa324c..43a1d1b809f0 100644
--- a/llvm/test/tools/llvm-objdump/ELF/AArch64/pcrel-address.yaml
+++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/pcrel-address.yaml
@@ -1,9 +1,11 @@
# RUN: yaml2obj %s -o %t
-# RUN: llvm-objdump %t -d --no-show-raw-insn --no-leading-addr | FileCheck %s
+# RUN: llvm-objdump %t -d --no-show-raw-insn | FileCheck %s
# CHECK-LABEL: <_start>:
-# CHECK-NEXT: adrp x2, 0x220000
-# CHECK-NEXT: adrp x2, 0x201000 <_start+0xf00>
+# CHECK-NEXT: 200100: adr x0, 0x220000
+# CHECK-NEXT: 200104: adr x0, 0x201004 <_start+0xf04>
+# CHECK-NEXT: 200108: adrp x2, 0x220000
+# CHECK-NEXT: 20010c: adrp x2, 0x201000 <_start+0xf00>
--- !ELF
FileHeader:
@@ -16,7 +18,7 @@ Sections:
Type: SHT_PROGBITS
Address: 0x200100
Flags: [SHF_ALLOC, SHF_EXECINSTR]
- Content: '02010090020000B0'
+ Content: '00F80F100078001002010090020000B0'
- Name: .data
Type: SHT_PROGBITS
Flags: [SHF_ALLOC, SHF_WRITE]
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