[PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.

Piyou Chen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 16 01:11:51 PST 2023


BeMg updated this revision to Diff 497924.
BeMg added a comment.

1. Rename some variables name (UserMOs -> UseMOs, UseMO -> UserMO)
2. Reorder if statement in processBasicBlock
3. Use [] instead of [&] because the body of the function doesn't use any variables other than DefMO.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129735/new/

https://reviews.llvm.org/D129735

Files:
  llvm/lib/Target/RISCV/CMakeLists.txt
  llvm/lib/Target/RISCV/RISCV.h
  llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVRVVInitUndef.cpp
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
  llvm/test/CodeGen/RISCV/O3-pipeline.ll
  llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
  llvm/test/CodeGen/RISCV/rvv/subregister-undef-early-clobber.mir
  llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
  llvm/test/CodeGen/RISCV/rvv/vrgatherei16-subreg-liveness.ll

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