[llvm] ebc21c7 - [Test] Add test for PR60736
Max Kazantsev via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 14 03:23:32 PST 2023
Author: Max Kazantsev
Date: 2023-02-14T18:23:12+07:00
New Revision: ebc21c7a2558b470765ab6f96c0544a5e602660a
URL: https://github.com/llvm/llvm-project/commit/ebc21c7a2558b470765ab6f96c0544a5e602660a
DIFF: https://github.com/llvm/llvm-project/commit/ebc21c7a2558b470765ab6f96c0544a5e602660a.diff
LOG: [Test] Add test for PR60736
Details at https://github.com/llvm/llvm-project/issues/60736
Added:
llvm/test/Transforms/SimpleLoopUnswitch/pr60736.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SimpleLoopUnswitch/pr60736.ll b/llvm/test/Transforms/SimpleLoopUnswitch/pr60736.ll
new file mode 100644
index 0000000000000..5407d2cca3355
--- /dev/null
+++ b/llvm/test/Transforms/SimpleLoopUnswitch/pr60736.ll
@@ -0,0 +1,49 @@
+; RUN: opt < %s -simple-loop-unswitch-inject-invariant-conditions=true -passes='loop(simple-loop-unswitch<nontrivial>,loop-instsimplify)' -S | FileCheck %s
+; REQUIRES: asserts
+; XFAIL: *
+
+define void @test() {
+; CHECK-LABEL: test
+bb:
+ %tmp = call i1 @llvm.experimental.widenable.condition()
+ %tmp1 = load atomic i32, ptr addrspace(1) poison unordered, align 8
+ %tmp2 = load atomic i32, ptr addrspace(1) poison unordered, align 8
+ br label %bb3
+
+bb3: ; preds = %bb15, %bb
+ br label %bb4
+
+bb4: ; preds = %bb13, %bb3
+ %tmp5 = phi i32 [ poison, %bb3 ], [ %tmp14, %bb13 ]
+ %tmp6 = phi i32 [ poison, %bb3 ], [ %tmp5, %bb13 ]
+ %tmp7 = add nuw nsw i32 %tmp6, 2
+ %tmp8 = icmp ult i32 %tmp7, %tmp2
+ br i1 %tmp8, label %bb9, label %bb16, !prof !0
+
+bb9: ; preds = %bb4
+ %tmp10 = icmp ult i32 %tmp7, %tmp1
+ %tmp11 = and i1 %tmp10, %tmp
+ br i1 %tmp11, label %bb12, label %bb17, !prof !0
+
+bb12: ; preds = %bb9
+ br i1 poison, label %bb15, label %bb13
+
+bb13: ; preds = %bb12
+ %tmp14 = add nuw nsw i32 %tmp5, 1
+ br label %bb4
+
+bb15: ; preds = %bb12
+ br label %bb3
+
+bb16: ; preds = %bb4
+ ret void
+
+bb17: ; preds = %bb9
+ ret void
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(inaccessiblemem: readwrite)
+declare i1 @llvm.experimental.widenable.condition()
+
+!0 = !{!"branch_weights", i32 1048576, i32 1}
+
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