[PATCH] D143646: [RISCV] Return false from shouldFormOverflowOp
Liao Chunyu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 19 23:57:30 PST 2023
liaolucy updated this revision to Diff 498742.
liaolucy added a comment.
Solving the regression of uaddo1_math_overflow_used.
the regression testcase.
define i64 @uaddo1_math_overflow_used(i64 %a, i64 %b, ptr %res) nounwind ssp {
%add = add i64 %b, %a
%cmp = icmp ult i64 %add, %a ----------%a
%Q = select i1 %cmp, i64 %b, i64 42
store i64 %add, ptr %res
ret i64 %Q
}
No regression, the testcase from the following of file
define i64 @uaddo2_math_overflow_used(i64 %a, i64 %b, ptr %res) nounwind ssp {
%add = add i64 %b, %a
%cmp = icmp ult i64 %add, %b -----------%b
%Q = select i1 %cmp, i64 %b, i64 42
store i64 %add, ptr %res
ret i64 %Q
}
So I think it is good to modify it to:
define i64 @uaddo1_math_overflow_used(i64 %a, i64 %b, ptr %res) nounwind ssp {
%add = add i64 %a, %b --------a and b exchange positions
%cmp = icmp ult i64 %add, %a
%Q = select i1 %cmp, i64 %b, i64 42
store i64 %add, ptr %res
ret i64 %Q
}
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143646/new/
https://reviews.llvm.org/D143646
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
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