[llvm] b0e7ca7 - [X86] Remove abs(sub_nsw()) -> abds fold from adbu test file

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-02-15T12:49:28Z
New Revision: b0e7ca79ab0cd22a6dbac853ace1e8f0a00b0a94

URL: https://github.com/llvm/llvm-project/commit/b0e7ca79ab0cd22a6dbac853ace1e8f0a00b0a94
DIFF: https://github.com/llvm/llvm-project/commit/b0e7ca79ab0cd22a6dbac853ace1e8f0a00b0a94.diff

LOG: [X86] Remove abs(sub_nsw()) -> abds fold from adbu test file

Copy+paste typo - it was correctly removed from 128/512 variants

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/abdu-vector-256.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/abdu-vector-256.ll b/llvm/test/CodeGen/X86/abdu-vector-256.ll
index abc73ce3b0ce..2c87a3846b44 100644
--- a/llvm/test/CodeGen/X86/abdu-vector-256.ll
+++ b/llvm/test/CodeGen/X86/abdu-vector-256.ll
@@ -456,127 +456,6 @@ define <4 x i64> @abd_minmax_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind {
   ret <4 x i64> %sub
 }
 
-;
-; abs(sub_nsw(x, y)) -> abdu(a,b)
-;
-
-define <32 x i8> @abd_subnsw_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
-; AVX1-LABEL: abd_subnsw_v32i8:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
-; AVX1-NEXT:    vpsubb %xmm2, %xmm3, %xmm2
-; AVX1-NEXT:    vpsubb %xmm1, %xmm0, %xmm0
-; AVX1-NEXT:    vpabsb %xmm0, %xmm0
-; AVX1-NEXT:    vpabsb %xmm2, %xmm1
-; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: abd_subnsw_v32i8:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpsubb %ymm1, %ymm0, %ymm0
-; AVX2-NEXT:    vpabsb %ymm0, %ymm0
-; AVX2-NEXT:    retq
-;
-; AVX512-LABEL: abd_subnsw_v32i8:
-; AVX512:       # %bb.0:
-; AVX512-NEXT:    vpsubb %ymm1, %ymm0, %ymm0
-; AVX512-NEXT:    vpabsb %ymm0, %ymm0
-; AVX512-NEXT:    retq
-  %sub = sub nsw <32 x i8> %a, %b
-  %abs = call <32 x i8> @llvm.abs.v32i8(<32 x i8> %sub, i1 false)
-  ret <32 x i8> %abs
-}
-
-define <16 x i16> @abd_subnsw_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind {
-; AVX1-LABEL: abd_subnsw_v16i16:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
-; AVX1-NEXT:    vpsubw %xmm2, %xmm3, %xmm2
-; AVX1-NEXT:    vpsubw %xmm1, %xmm0, %xmm0
-; AVX1-NEXT:    vpabsw %xmm0, %xmm0
-; AVX1-NEXT:    vpabsw %xmm2, %xmm1
-; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: abd_subnsw_v16i16:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpsubw %ymm1, %ymm0, %ymm0
-; AVX2-NEXT:    vpabsw %ymm0, %ymm0
-; AVX2-NEXT:    retq
-;
-; AVX512-LABEL: abd_subnsw_v16i16:
-; AVX512:       # %bb.0:
-; AVX512-NEXT:    vpsubw %ymm1, %ymm0, %ymm0
-; AVX512-NEXT:    vpabsw %ymm0, %ymm0
-; AVX512-NEXT:    retq
-  %sub = sub nsw <16 x i16> %a, %b
-  %abs = call <16 x i16> @llvm.abs.v16i16(<16 x i16> %sub, i1 false)
-  ret <16 x i16> %abs
-}
-
-define <8 x i32> @abd_subnsw_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind {
-; AVX1-LABEL: abd_subnsw_v8i32:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
-; AVX1-NEXT:    vpsubd %xmm2, %xmm3, %xmm2
-; AVX1-NEXT:    vpsubd %xmm1, %xmm0, %xmm0
-; AVX1-NEXT:    vpabsd %xmm0, %xmm0
-; AVX1-NEXT:    vpabsd %xmm2, %xmm1
-; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: abd_subnsw_v8i32:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpsubd %ymm1, %ymm0, %ymm0
-; AVX2-NEXT:    vpabsd %ymm0, %ymm0
-; AVX2-NEXT:    retq
-;
-; AVX512-LABEL: abd_subnsw_v8i32:
-; AVX512:       # %bb.0:
-; AVX512-NEXT:    vpsubd %ymm1, %ymm0, %ymm0
-; AVX512-NEXT:    vpabsd %ymm0, %ymm0
-; AVX512-NEXT:    retq
-  %sub = sub nsw <8 x i32> %a, %b
-  %abs = call <8 x i32> @llvm.abs.v8i32(<8 x i32> %sub, i1 false)
-  ret <8 x i32> %abs
-}
-
-define <4 x i64> @abd_subnsw_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind {
-; AVX1-LABEL: abd_subnsw_v4i64:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
-; AVX1-NEXT:    vpsubq %xmm2, %xmm3, %xmm2
-; AVX1-NEXT:    vpsubq %xmm1, %xmm0, %xmm0
-; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm1
-; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
-; AVX1-NEXT:    vpsubq %xmm2, %xmm3, %xmm2
-; AVX1-NEXT:    vpsubq %xmm0, %xmm3, %xmm0
-; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
-; AVX1-NEXT:    vblendvpd %ymm1, %ymm0, %ymm1, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: abd_subnsw_v4i64:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpsubq %ymm1, %ymm0, %ymm0
-; AVX2-NEXT:    vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT:    vpsubq %ymm0, %ymm1, %ymm1
-; AVX2-NEXT:    vblendvpd %ymm0, %ymm1, %ymm0, %ymm0
-; AVX2-NEXT:    retq
-;
-; AVX512-LABEL: abd_subnsw_v4i64:
-; AVX512:       # %bb.0:
-; AVX512-NEXT:    vpsubq %ymm1, %ymm0, %ymm0
-; AVX512-NEXT:    vpabsq %ymm0, %ymm0
-; AVX512-NEXT:    retq
-  %sub = sub nsw <4 x i64> %a, %b
-  %abs = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %sub, i1 false)
-  ret <4 x i64> %abs
-}
-
 declare <32 x i8> @llvm.abs.v32i8(<32 x i8>, i1)
 declare <16 x i16> @llvm.abs.v16i16(<16 x i16>, i1)
 declare <8 x i32> @llvm.abs.v8i32(<8 x i32>, i1)