[PATCH] D143439: [RISCV] Add vendor-defined XTheadBb (basic bit-manipulation) extension

[Yingchi Long via Phabricator via llvm-commits]

inclyc added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:320
+    if (Subtarget.is64Bit())
+      setOperationAction({ISD::CTLZ, ISD::CTLZ_ZERO_UNDEF}, MVT::i32, Custom);
+  }
----------------
inclyc wrote:
> And this one
Ah, this is my fault :(. There should be only 1 warning on line 315


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143439/new/

https://reviews.llvm.org/D143439