[PATCH] D136861: [IR] Add LLVM IR support for target("aarch64.svcount") type.

[Nikita Popov via Phabricator via llvm-commits]

nikic added inline comments.


================
Comment at: llvm/lib/Transforms/Scalar/SROA.cpp:895
 
     uint64_t Size = DL.getTypeStoreSize(LI.getType()).getFixedValue();
     return handleLoadOrStore(LI.getType(), LI, Offset, Size, LI.isVolatile());
----------------
I think it would be more elegant to get the `TypeSize` return value here and check whether it is `isScalable()`. That would avoid the need to explicitly check for ScalableVectorType and scalable target extension types. (Feel free to pre-commit as an NFC change and reduce the diff here.)

```
TypeSize Size = DL.getTypeStoreSize(LI.getType());
if (Size.isScalable())
  return PI.setAborted(&LI);
return handleLoadOrStore(LI.getType(), LI, Offset, Size.getFixedValue(), LI.isVolatile());
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136861/new/

https://reviews.llvm.org/D136861