[PATCH] D140460: [RISCV][MC] Add FLI instruction support for the experimental zfa extension

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h:409
+  uint8_t Sign = Imm.extractBitsAsZExtValue(1, 63);
+  uint8_t Mantissa = Imm.extractBitsAsZExtValue(3, 49);
+
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joshua-arch1 wrote:
> craig.topper wrote:
> > You can't use only 3 bits of the mantissa to match an immediate for `isFPImmLegal` in the other patch. It has to be bit exact for the entire 64 bit value.
> In the encoding table, only the top 3 bit of the mantissa differs. We don't need to use all the bits to distinguish between different values. 3-bit expression will not influence precision.
This function is used by CodeGen in your other patch. That must check all bits of the value. Looking at only 3 bits aliases many distinct values together. This is why your patch accepted `ret double 0x102F3E9DF9CF94` as "min" when it should only accept `double 0x0010000000000000`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140460/new/

https://reviews.llvm.org/D140460