[PATCH] D143945: [AMDGPU] Add legalization case for PTR_ADD on buffer pointers

[Krzysztof Drewniak via Phabricator via llvm-commits]

krzysz00 added a comment.

@arsenm Yeah, I think there's room for a broader design conversation here. My theory was that we could pattern-match PTR_ADD and G_{LOAD,STORE,...} into the relevant buffer instructions at some point in the lowering process, but I didn't have a good sense of where - I figured it'd be after legalization pass, though.

My sense of the goal is to try and keep the fat pointers as `p7` values as long as we can manage it, although that does mean we'd need to do things like the `voffset`/`imm` split somewhere further down the codegen pipeline than I think they currently are.

The other option would be to lower these `G_LOAD` operations into the relevant intrinsic instructions pretty early on and then to pattern-match all the address calculation onto them, which might have the downside that it loses alias information?

(I'm also suspecting that the definitions of a lot of the buffer ops might need to be loosened from `s4i32`/`v4i32`, to `SReg_128`/`VReg_128`, since that's the actual constraint, but that's not this patch)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143945/new/

https://reviews.llvm.org/D143945