[PATCH] D142594: [AArch64] Eliminating the use of integer unit in moving from a Neon scalar result of a uaddlv to a Neon vector

[Florian Hahn via Phabricator via llvm-commits]

fhahn added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp:582
+          .add(MI.getOperand(2))
+          .addUse(SrcReg, RegState::Kill)
+          .addImm(0);
----------------
dmgreen wrote:
> It may not be Killed if it has other uses.
If this is not covered by the existing tests, could you add one that covers this case?


================
Comment at: llvm/test/CodeGen/AArch64/peephole-insvigpr.mir:25
+  entry:
+    %vaddlv = tail call i64 @llvm.aarch64.neon.uaddlv.i64.v4i32(<4 x i32> zeroinitializer)
+    %1 = insertelement <6 x i64> zeroinitializer, i64 %vaddlv, i64 0
----------------
you should be able to keep the function here to a minimum, i.e.

```
  define void @insert_vec_v6i64_uaddlv_from_v4i32() {
    ret void
   }
```

Then you have to remove the references to LLVM IR in the MIR itself, .e.g.


`bb.0.entry: -> `bb.0:`


 `STRDui killed %17, %0, 2 :: (store (s64) into %ir.0 + 16) -> STRDui killed %17, %0, 2 :: (store (s64))`


================
Comment at: llvm/test/CodeGen/AArch64/peephole-insvigpr.mir:86
+hasEHCatchret:   false
+hasEHScopes:     false
+hasEHFunclets:   false
----------------
I think most of those should be removable. Also would be good to add the new test separately.


================
Comment at: llvm/test/CodeGen/AArch64/peephole-insvigpr.mir:92
+registers:
+  - { id: 0, class: gpr64common, preferred-register: '' }
+  - { id: 1, class: fpr128, preferred-register: '' }
----------------
you probably are also able to remove this.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142594/new/

https://reviews.llvm.org/D142594