[PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics

[Luke Lau via Phabricator via llvm-commits]

luke added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6534-6539
+  SDValue EvenMask = DAG.getSplatVector(
+      MVT::getVectorVT(MVT::i16,
+                       MaskTy.getVectorElementCount().divideCoefficientBy(2)),
+      DL, DAG.getConstant(1, DL, XLenVT));
+  EvenMask = DAG.getBitcast(MaskTy.changeVectorElementType(MVT::i8), EvenMask);
+  EvenMask = DAG.getNode(ISD::TRUNCATE, DL, MaskTy, EvenMask);
----------------
I'm not that happy with how this mask is generated.
Ideally we would just `vmv.v.i v0, 0x55` directly, but I can't seem to do it in a way that keeps SelectionDAG happy. Namely, it doesn't allow bitcasting `<vscale x n x i8>` -> `<vscale x n i1>`


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D144092/new/

https://reviews.llvm.org/D144092