[PATCH] D143315: [m68k] Implement BSR Instruction
Min-Yih Hsu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 14 13:55:18 PST 2023
myhsu accepted this revision.
myhsu added a comment.
This revision is now accepted and ready to land.
LGTM with minor suggestions
================
Comment at: llvm/lib/Target/M68k/M68kInstrControl.td:239
+let isBranch = 1, isTerminator = 1 in
+class MxBsr<Operand TARGET, MxType TYPE, dag disp_8, dag disp_16_32>
+ : MxInst<(outs), (ins TARGET:$dst), "bsr."#TYPE.Prefix#"\t$dst"> {
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another way to simplify this part of the code is to conditionally assign different layout of dags to `Inst` using `TYPE.Size`. Such that
1. You can have just one `dag disp` template argument
2. You don't need the empty `(ascend)` on line 248
Personally I don't have strong opinion on whether to adopt this simplification since the current version is not utterly messy, so it's up to you
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143315/new/
https://reviews.llvm.org/D143315
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