[PATCH] D143706: [AMDGPU] Add switch to enable architected SGPRs.
Christudasan Devadasan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 13 08:41:33 PST 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGb35d0a6834f8: [AMDGPU] Add switch to enable architected SGPRs. (authored by cdevadas).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143706/new/
https://reviews.llvm.org/D143706
Files:
llvm/lib/Target/AMDGPU/AMDGPU.td
llvm/lib/Target/AMDGPU/GCNSubtarget.h
Index: llvm/lib/Target/AMDGPU/GCNSubtarget.h
===================================================================
--- llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -175,6 +175,7 @@
bool ScalarFlatScratchInsts = false;
bool HasArchitectedFlatScratch = false;
bool EnableFlatScratch = false;
+ bool HasArchitectedSGPRs = false;
bool AddNoCarryInsts = false;
bool HasUnpackedD16VMem = false;
bool LDSMisalignedBug = false;
@@ -1132,6 +1133,9 @@
/// In this case it is readonly.
bool flatScratchIsArchitected() const { return HasArchitectedFlatScratch; }
+ /// \returns true if the architected SGPRs are enabled.
+ bool hasArchitectedSGPRs() const { return HasArchitectedSGPRs; }
+
/// \returns true if the machine has merged shaders in which s0-s7 are
/// reserved by the hardware and user SGPRs start at s8
bool hasMergedShaders() const {
Index: llvm/lib/Target/AMDGPU/AMDGPU.td
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPU.td
+++ llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -866,6 +866,12 @@
"Flat Scratch register is a readonly SPI initialized architected register"
>;
+def FeatureArchitectedSGPRs : SubtargetFeature<"architected-sgprs",
+ "HasArchitectedSGPRs",
+ "true",
+ "Enable the architected SGPRs"
+>;
+
// Dummy feature used to disable assembler instructions.
def FeatureDisable : SubtargetFeature<"",
"FeatureDisable","true",
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