[PATCH] D141431: [AArch64] FEAT_LRCPC3 load/store optimisations

[Tomas Matheson via Phabricator via llvm-commits]

tmatheson planned changes to this revision.
tmatheson marked 2 inline comments as done.
tmatheson added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:2552-2556
+  bool IsImmPreLdSt =
+      IsPreLdSt && MI.getNumOperands() >= 4 && MI.getOperand(3).isImm();
+  bool IsTypicalCase = MI.getNumOperands() >= 3 && MI.getOperand(2).isImm();
 
+  if (!IsTypicalCase && !IsImmPreLdSt && !hasRCPC3PrePostIndexVariant(MI))
----------------
lenary wrote:
> Please split this into three different `if`s with comments to make these conditions readable/explanable. 
There's not really much I can do with it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141431/new/

https://reviews.llvm.org/D141431