[PATCH] D143723: [RISCV] Increase default vectorizer LMUL to 2

Lorenzo Albano via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 16 09:01:54 PST 2023


loralb added a comment.

In D143723#4128065 <https://reviews.llvm.org/D143723#4128065>, @craig.topper wrote:

> We could change `getMaxInterleaveFactor()` to return 1 instead of 2. We probably should do that since LMUL is like hardware interleaving.
>
> I would still like to know why increasing LMUL also increased interleaving.

Hi everyone!
About @craig.topper question, at BSC we already had the "pleasure" of stumbling into this: as far as my understanding goes, this happens because of the getMaxInterleaveFactor() <https://github.com/llvm/llvm-project/blob/9305b63d695123b9e8bc5e7a568ab890dcf9514b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h#L273> function in `llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h`. Basically, a `VF` value of 1 is interpreted as "loop not vectorized" (since, for example, `[1 x i64]` is like a scalar `i64`), hence disabling interleaving. With a default LMUL value of 2 though, the `VF == 1` check fails, meaning the actual MaxInterleavingFactor <https://github.com/llvm/llvm-project/blob/9305b63d695123b9e8bc5e7a568ab890dcf9514b/llvm/lib/Target/RISCV/RISCVSubtarget.h#L56> value is used.

P.S. As you may have noticed,  the check in getMaxInterleaveFactor() <https://github.com/llvm/llvm-project/blob/9305b63d695123b9e8bc5e7a568ab890dcf9514b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h#L273> completly ignores the existence of scalable vectors.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143723/new/

https://reviews.llvm.org/D143723



More information about the llvm-commits mailing list