[PATCH] D143982: [RISCV][CodeGen] Add codegen pattern for experimental zfa extension (FLI and FCVTMOD not included)

[Craig Topper via Phabricator via llvm-commits]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM with that one formatting fix.



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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td:137
+                        Sched<[WriteFMovF32ToI32, ReadFMovF32ToI32]>;
+  }
 } // Predicates = [HasStdExtZfa, HasStdExtD, IsRV32]
----------------
This `}` should line up with the `l` in `let`


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  https://reviews.llvm.org/D143982/new/

https://reviews.llvm.org/D143982