[llvm] 4198ff0 - [AArch64] Add NZCV Def for TLSDESC_CALLSEQ

[David Green via llvm-commits]

Author: Mirko Müller
Date: 2023-02-13T16:14:23Z
New Revision: 4198ff0cb999b57a2392dea60c7169f298c15e33

URL: https://github.com/llvm/llvm-project/commit/4198ff0cb999b57a2392dea60c7169f298c15e33
DIFF: https://github.com/llvm/llvm-project/commit/4198ff0cb999b57a2392dea60c7169f298c15e33.diff

LOG: [AArch64] Add NZCV Def for TLSDESC_CALLSEQ

The glibc and older musl handlers of tlsdesc_dynamic use a cmp instruction
which will clobber NZCV.

See glibc's _dl_tlsdesc_dynamic:
https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/aarch64/dl-tlsdesc.S;hb=refs/heads/release/2.37/master

See v1.1.21 Musl's __tlsdesc_dynamic:
https://git.musl-libc.org/cgit/musl/tree/src/ldso/aarch64/tlsdesc.s?h=v1.1.21

Differential Revision: https://reviews.llvm.org/D143157

Added: 
    llvm/test/CodeGen/AArch64/aarch64-tls-flags.ll

Modified: 
    llvm/lib/Target/AArch64/AArch64InstrInfo.td

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index a15d3eca6ecd..70618411e5b9 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -2612,7 +2612,7 @@ def EMITMTETAGGED : Pseudo<(outs), (ins), []>, Sched<[]> {}
 // FIXME: maybe the scratch register used shouldn't be fixed to X1?
 // FIXME: can "hasSideEffects be dropped?
 // This gets lowered to an instruction sequence which takes 16 bytes
-let isCall = 1, Defs = [LR, X0, X1], hasSideEffects = 1, Size = 16,
+let isCall = 1, Defs = [NZCV, LR, X0, X1], hasSideEffects = 1, Size = 16,
     isCodeGenOnly = 1 in
 def TLSDESC_CALLSEQ
     : Pseudo<(outs), (ins i64imm:$sym),

diff  --git a/llvm/test/CodeGen/AArch64/aarch64-tls-flags.ll b/llvm/test/CodeGen/AArch64/aarch64-tls-flags.ll
new file mode 100644
index 000000000000..f5497a04d6dc
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/aarch64-tls-flags.ll
@@ -0,0 +1,36 @@
+; RUN: llc -mtriple=aarch64-unknown-linux-gnu -relocation-model=pic -verify-machineinstrs %s -o - | FileCheck %s
+
+; TLSDESC resolver calling convention does not retain the flags register.
+; Check that a TLS descriptor call cannot be lowered in between a cmp and the use of flags.
+
+ at var = thread_local global i32 zeroinitializer
+ at test = global i32 zeroinitializer
+
+define i32 @test_thread_local() {
+; CHECK-LABEL: test_thread_local:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-NEXT:    .cfi_offset w30, -16
+; CHECK-NEXT:    adrp x8, :got:test
+; CHECK-NEXT:    ldr x8, [x8, :got_lo12:test]
+; CHECK-NEXT:    adrp x0, :tlsdesc:var
+; CHECK-NEXT:    ldr x1, [x0, :tlsdesc_lo12:var]
+; CHECK-NEXT:    add x0, x0, :tlsdesc_lo12:var
+; CHECK-NEXT:    .tlsdesccall var
+; CHECK-NEXT:    blr x1
+; CHECK-NEXT:    mrs x9, TPIDR_EL0
+; CHECK-NEXT:    ldr w9, [x9, x0]
+; CHECK-NEXT:    cmp x8, #0
+; CHECK-NEXT:    cinc w0, w9, eq
+; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT:    ret
+
+  %testval = load i32, ptr @test
+  %test = icmp eq ptr @test, null
+  %val = load i32, ptr @var
+  %result = zext i1 %test to i32
+  %result2 = add i32 %val, %result
+  ret i32 %result2
+
+}