[PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n added inline comments.


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Comment at: llvm/test/CodeGen/X86/opt-pipeline.ll:204
 ; CHECK-NEXT:       X86 LEA Fixup
+; CHECK-NEXT:       X86 Fixup ISel
 ; CHECK-NEXT:       Compressing EVEX instrs to VEX encoding when possible
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pengfei wrote:
> Is the pass too far away from `ISel`?
I think we want it to run quite after all other instruction transformations.

The important ones are register allocation (so we convert `vpermlipsri` -> `vshufpsrri` at a spill) and domainfixup (so we have the correct instructions).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143787/new/

https://reviews.llvm.org/D143787