[PATCH] D144143: [RISCV] Improve isInterleaveShuffle to handle interleaving the high half and low half of the same source.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 17 08:24:41 PST 2023
craig.topper added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll:422
+; V512-NEXT: ret
+ %a = shufflevector <4 x half> %x, <4 x half> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
+ ret <4 x half> %a
----------------
reames wrote:
> From the test name, I'd expect these to be float not half. Did you forget to update the test?
Yes I did forget. Probably got tripped up by needing to replace both half->float and f16->f32 for floating point. For integer I only needed i16->i32 to update the test name and the content.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D144143/new/
https://reviews.llvm.org/D144143
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