[PATCH] D144229: [RISCV] Select signed and unsigned bitfield extracts for XTHeadBb

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll:1143
 ; RV32XTHEADBB:       # %bb.0:
-; RV32XTHEADBB-NEXT:    th.extu a0, a0, 15, 0
+; RV32XTHEADBB-NEXT:    slli a0, a0, 16
+; RV32XTHEADBB-NEXT:    srli a0, a0, 16
----------------
This looks worse


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Comment at: llvm/test/CodeGen/RISCV/rv32xtheadbb.ll:368
 ; RV32XTHEADBB:       # %bb.0:
-; RV32XTHEADBB-NEXT:    th.extu a0, a0, 15, 0
+; RV32XTHEADBB-NEXT:    slli a0, a0, 16
+; RV32XTHEADBB-NEXT:    srli a0, a0, 16
----------------
This looks worse


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144229/new/

https://reviews.llvm.org/D144229