[PATCH] D143681: [llvm][test] restrict 2 GVN tests to just test GVN (NFC)
Nick Desaulniers via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 14 09:22:05 PST 2023
nickdesaulniers updated this revision to Diff 497359.
nickdesaulniers added a comment.
- update comment in test as per @nikic
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143681/new/
https://reviews.llvm.org/D143681
Files:
llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll
llvm/test/Transforms/NewGVN/no_speculative_loads_with_asan.ll
Index: llvm/test/Transforms/NewGVN/no_speculative_loads_with_asan.ll
===================================================================
--- llvm/test/Transforms/NewGVN/no_speculative_loads_with_asan.ll
+++ llvm/test/Transforms/NewGVN/no_speculative_loads_with_asan.ll
@@ -1,11 +1,27 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -opaque-pointers=0 -O3 -S %s | FileCheck %s
+; RUN: opt -opaque-pointers=0 -passes=newgvn -S %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
declare noalias i8* @_Znam(i64) #1
define i32 @TestNoAsan() {
; CHECK-LABEL: @TestNoAsan(
-; CHECK-NEXT: ret i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @_Znam(i64 2)
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 1
+; CHECK-NEXT: store i8 0, i8* [[TMP2]], align 1
+; CHECK-NEXT: store i8 0, i8* [[TMP1]], align 1
+; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i16*
+; CHECK-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i16 [[TMP4]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[TMP11:%.*]], label [[TMP6:%.*]]
+; CHECK: 6:
+; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 2
+; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16*
+; CHECK-NEXT: [[TMP9:%.*]] = load i16, i16* [[TMP8]], align 2
+; CHECK-NEXT: [[TMP10:%.*]] = sext i16 [[TMP9]] to i32
+; CHECK-NEXT: br label [[TMP11]]
+; CHECK: 11:
+; CHECK-NEXT: [[TMP12:%.*]] = phi i32 [ [[TMP10]], [[TMP6]] ], [ 0, [[TMP0:%.*]] ]
+; CHECK-NEXT: ret i32 [[TMP12]]
;
%1 = tail call noalias i8* @_Znam(i64 2)
%2 = getelementptr inbounds i8, i8* %1, i64 1
@@ -30,7 +46,7 @@
define i32 @TestAsan() sanitize_address {
; CHECK-LABEL: @TestAsan(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias dereferenceable_or_null(2) i8* @_Znam(i64 2)
+; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @_Znam(i64 2)
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 1
; CHECK-NEXT: store i8 0, i8* [[TMP2]], align 1
; CHECK-NEXT: store i8 0, i8* [[TMP1]], align 1
@@ -71,7 +87,7 @@
define i32 @TestHWAsan() sanitize_hwaddress {
; CHECK-LABEL: @TestHWAsan(
-; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias dereferenceable_or_null(2) i8* @_Znam(i64 2)
+; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @_Znam(i64 2)
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 1
; CHECK-NEXT: store i8 0, i8* [[TMP2]], align 1
; CHECK-NEXT: store i8 0, i8* [[TMP1]], align 1
Index: llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll
===================================================================
--- llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll
+++ llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll
@@ -1,11 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -O3 -S %s | FileCheck %s
+; RUN: opt -passes=gvn -S %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
declare noalias ptr @_Znam(i64) #1
+; Load of %i8 is an out of bounds load, which is folded to poison, which allows
+; us to elide the phi.
define i32 @TestNoAsan() {
; CHECK-LABEL: @TestNoAsan(
; CHECK-NEXT: bb:
+; CHECK-NEXT: [[I:%.*]] = tail call noalias ptr @_Znam(i64 2)
+; CHECK-NEXT: [[I1:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 1
+; CHECK-NEXT: store i8 0, ptr [[I1]], align 1
+; CHECK-NEXT: store i8 0, ptr [[I]], align 1
+; CHECK-NEXT: [[I3:%.*]] = load i16, ptr [[I]], align 4
+; CHECK-NEXT: [[I4:%.*]] = icmp eq i16 [[I3]], 0
+; CHECK-NEXT: br i1 [[I4]], label [[BB10:%.*]], label [[BB5:%.*]]
+; CHECK: bb5:
+; CHECK-NEXT: [[I6:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 2
+; CHECK-NEXT: br label [[BB10]]
+; CHECK: bb10:
; CHECK-NEXT: ret i32 0
;
bb:
@@ -31,7 +44,7 @@
define i32 @TestAsan() sanitize_address {
; CHECK-LABEL: @TestAsan(
; CHECK-NEXT: bb:
-; CHECK-NEXT: [[I:%.*]] = tail call noalias dereferenceable_or_null(2) ptr @_Znam(i64 2)
+; CHECK-NEXT: [[I:%.*]] = tail call noalias ptr @_Znam(i64 2)
; CHECK-NEXT: [[I1:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 1
; CHECK-NEXT: store i8 0, ptr [[I1]], align 1
; CHECK-NEXT: store i8 0, ptr [[I]], align 1
@@ -70,7 +83,7 @@
define i32 @TestHWAsan() sanitize_hwaddress {
; CHECK-LABEL: @TestHWAsan(
; CHECK-NEXT: bb:
-; CHECK-NEXT: [[I:%.*]] = tail call noalias dereferenceable_or_null(2) ptr @_Znam(i64 2)
+; CHECK-NEXT: [[I:%.*]] = tail call noalias ptr @_Znam(i64 2)
; CHECK-NEXT: [[I1:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 1
; CHECK-NEXT: store i8 0, ptr [[I1]], align 1
; CHECK-NEXT: store i8 0, ptr [[I]], align 1
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