[PATCH] D144051: [SCEV] Do not strengthen nuw/nsw flags during get[Zero,Sign]ExtendedExpr.
Florian Hahn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 14 15:14:51 PST 2023
fhahn created this revision.
fhahn added reviewers: mkazantsev, nikic, reames.
Herald added subscribers: StephenFan, hiraditya.
Herald added a project: All.
fhahn requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Modifying AddRecs when constructing other expressions can lead to
surprising changes. It also seems like it is not really beneficial i
most cases.
At the moment, there's a single regression, but we still might be able
to improve the flags at AddRec construction.
Might help with the issue discussed in D143409 <https://reviews.llvm.org/D143409>.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D144051
Files:
llvm/lib/Analysis/ScalarEvolution.cpp
llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll
Index: llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll
===================================================================
--- llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll
+++ llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll
@@ -146,7 +146,7 @@
; CHECK-NEXT: [[VECTORP:%.*]] = getelementptr inbounds [0 x double], ptr [[VECTOR:%.*]], i32 0, i64 [[INDVARS_IV2]]
; CHECK-NEXT: [[V2:%.*]] = load double, ptr [[VECTORP]], align 8
; CHECK-NEXT: call void @use(double [[V2]])
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], [[TMP0]]
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], [[TMP0]]
; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], [[WIDE_TRIP_COUNT]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[RETURN_LOOPEXIT:%.*]]
Index: llvm/lib/Analysis/ScalarEvolution.cpp
===================================================================
--- llvm/lib/Analysis/ScalarEvolution.cpp
+++ llvm/lib/Analysis/ScalarEvolution.cpp
@@ -1684,11 +1684,6 @@
unsigned BitWidth = getTypeSizeInBits(AR->getType());
const Loop *L = AR->getLoop();
- if (!AR->hasNoUnsignedWrap()) {
- auto NewFlags = proveNoWrapViaConstantRanges(AR);
- setNoWrapFlags(const_cast<SCEVAddRecExpr *>(AR), NewFlags);
- }
-
// If we have special knowledge that this addrec won't overflow,
// we don't need to do any further analysis.
if (AR->hasNoUnsignedWrap()) {
@@ -2045,11 +2040,6 @@
unsigned BitWidth = getTypeSizeInBits(AR->getType());
const Loop *L = AR->getLoop();
- if (!AR->hasNoSignedWrap()) {
- auto NewFlags = proveNoWrapViaConstantRanges(AR);
- setNoWrapFlags(const_cast<SCEVAddRecExpr *>(AR), NewFlags);
- }
-
// If we have special knowledge that this addrec won't overflow,
// we don't need to do any further analysis.
if (AR->hasNoSignedWrap()) {
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