[PATCH] D136861: [IR] Add LLVM IR support for target("aarch64.svcount") type.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 14 06:57:59 PST 2023
sdesmalen added inline comments.
================
Comment at: llvm/lib/Transforms/Scalar/SROA.cpp:895
uint64_t Size = DL.getTypeStoreSize(LI.getType()).getFixedValue();
return handleLoadOrStore(LI.getType(), LI, Offset, Size, LI.isVolatile());
----------------
nikic wrote:
> I think it would be more elegant to get the `TypeSize` return value here and check whether it is `isScalable()`. That would avoid the need to explicitly check for ScalableVectorType and scalable target extension types. (Feel free to pre-commit as an NFC change and reduce the diff here.)
>
> ```
> TypeSize Size = DL.getTypeStoreSize(LI.getType());
> if (Size.isScalable())
> return PI.setAborted(&LI);
> return handleLoadOrStore(LI.getType(), LI, Offset, Size.getFixedValue(), LI.isVolatile());
> ```
That makes sense, thanks for the suggestion. I can do the same (look at allocated type size, rather than the type itself) for all other cases in this file as well.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136861/new/
https://reviews.llvm.org/D136861
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