[PATCH] D143796: [SelectionDAG] Negate constant offset before morphing load/store node with pre-dec/post-dec addressing mode.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

I think the targets that use PRE_DEC are ARM and AVR.  If existing testcases for PRE_DEC work on those targets, maybe we don't need to be too concerned about other targets?  I guess maybe they don't hit this code, somehow?

This still doesn't seem conceptually correct, though.  A PRE_DEC addressing mode doesn't have to be an immediate; it can be an arbitrary runtime value.  And there isn't any way to negate an arbitrary value without creating extra nodes.  So I'd expect any necessary negation to happen in target-specific code.

Probably the simplest thing is just to fix the AArch64 code so it never generates PRE_DEC/POST_DEC.  They really just make things more complicated, and we don't need them on AArch64 because the all PRE_INC/PRE_DEC ops have an immediate offset.

The pre_store pattern in TableGen seems like sort of a trap: it encompasses both PRE_INC and PRE_DEC, but doesn't provide any way to actually tell whether you matched a PRE_INC or a PRE_DEC.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D143796/new/

https://reviews.llvm.org/D143796