[PATCH] D143731: [AMDGPU] Break-up large PHIs for DAGISel
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 13 17:12:02 PST 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:1415
+
+ return B.CreateExtractVector(SubVecTy, Val, B.getInt64(Idx));
+}
----------------
This must be a new intrinsic, I didn't know it existed. Usually you would do a shufflevector to get the reduced elements
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:1438
+ bool IsVec = false;
+ std::vector<Value *> IncomingValues = {};
+ PHINode *NewPHI = nullptr;
----------------
Don't need = {}
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143731/new/
https://reviews.llvm.org/D143731
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