[PATCH] D139491: [PowerPC] remove XXSWAPD after load from CP which is a splat value

[Ting Wang via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG52a774fd4c18: [PowerPC] remove XXSWAPD after load from CP which is a splat value (authored by tingwang).

Changed prior to commit:
  https://reviews.llvm.org/D139491?vs=481147&id=498191#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139491/new/

https://reviews.llvm.org/D139491

Files:
  llvm/lib/Target/PowerPC/PPCInstrInfo.h
  llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
  llvm/test/CodeGen/PowerPC/build-vector-tests.ll
  llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
  llvm/test/CodeGen/PowerPC/combine-fneg.ll
  llvm/test/CodeGen/PowerPC/fma-combine.ll
  llvm/test/CodeGen/PowerPC/fp-classify.ll
  llvm/test/CodeGen/PowerPC/mul-const-vector.ll
  llvm/test/CodeGen/PowerPC/pr25080.ll
  llvm/test/CodeGen/PowerPC/pr47891.ll
  llvm/test/CodeGen/PowerPC/recipest.ll
  llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll
  llvm/test/CodeGen/PowerPC/sat-add.ll
  llvm/test/CodeGen/PowerPC/signbit-shift.ll
  llvm/test/CodeGen/PowerPC/srem-seteq-illegal-types.ll
  llvm/test/CodeGen/PowerPC/vec-itofp.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
  llvm/test/CodeGen/PowerPC/vector-extend-sign.ll
  llvm/test/CodeGen/PowerPC/vsx.ll

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