[PATCH] D144033: [AMDGPU][MC][GFX11] Add partial NSA format for image sample instructions

[Mirko Brkusanin via Phabricator via llvm-commits]

mbrkusanin created this revision.
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Image sample instructions that need more than 5 VGPRs for VAddr can use
partial NSA for NSA encoding format. VGPRs that can not fit into the
encoding are sequential after the last one.
This patch adds assembly and disassembly parts.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D144033

Files:
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  llvm/lib/Target/AMDGPU/MIMGInstructions.td
  llvm/test/MC/AMDGPU/gfx11_asm_mimg_features.s
  llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg_features.txt

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