[PATCH] D143787: [X86] Add new pass `X86FixupISel` for fixing up machine-instruction selection.
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 16 00:18:01 PST 2023
pengfei added inline comments.
================
Comment at: llvm/lib/Target/X86/X86FixupISel.cpp:27
+
+#define DEBUG_TYPE "x86-fixup-ISel"
+
----------------
We often use all lower case latters.
================
Comment at: llvm/lib/Target/X86/X86FixupISel.cpp:69
+
+ auto processVPERMILPSm = [&](unsigned NewOpc) {
+ if (!ST->hasNoDomainDelayShuffle())
----------------
Lambda function name should starts with upper latter.
================
Comment at: llvm/lib/Target/X86/X86FixupISel.cpp:75
+ };
+ auto processVPERMILPSr = [&](unsigned NewOpc) {
+ unsigned MaskImm = MI.getOperand(NumOperands - 1).getImm();
----------------
ditto.
================
Comment at: llvm/lib/Target/X86/X86FixupISel.cpp:86
+ case X86::VPERMILPSri:
+ return processVPERMILPSr(X86::VSHUFPSrri);
+ case X86::VPERMILPSYri:
----------------
Better to use processVPERMILPSri/processVPERMILPSmi
================
Comment at: llvm/test/CodeGen/X86/opt-pipeline.ll:204
; CHECK-NEXT: X86 LEA Fixup
+; CHECK-NEXT: X86 Fixup ISel
; CHECK-NEXT: Compressing EVEX instrs to VEX encoding when possible
----------------
Is the pass too far away from `ISel`?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143787/new/
https://reviews.llvm.org/D143787
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