[PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics

[Luke Lau via Phabricator via llvm-commits]

luke added a comment.

In D144092#4129342 <https://reviews.llvm.org/D144092#4129342>, @craig.topper wrote:

> These should be implementable with clever use of vwaddu and vwmaccu. To avoid the vrgather.

That's a much better approach. But it won't work for i64 though right? In https://reviews.llvm.org/D144143 it falls back to a vrgather with a constant index vector

  ; RV32-V128-LABEL: unary_interleave_v4i64:
  ; RV32-V128:       # %bb.0:
  ; RV32-V128-NEXT:    lui a0, %hi(.LCPI19_0)
  ; RV32-V128-NEXT:    addi a0, a0, %lo(.LCPI19_0)
  ; RV32-V128-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
  ; RV32-V128-NEXT:    vle16.v v12, (a0)
  ; RV32-V128-NEXT:    vrgatherei16.vv v10, v8, v12
  ; RV32-V128-NEXT:    vmv.v.v v8, v10
  ; RV32-V128-NEXT:    ret

We can't load the indices for a scalable vector because it'll be of unknown size.


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https://reviews.llvm.org/D144092