[PATCH] D143988: [AArch64] Always lower fp16 zero to FMOVH0

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:9795
+        Imm.isPosZero();
   // TODO: fmov h0, w0 is also legal, however on't have an isel pattern to
   //       generate that fmov.
----------------
Nit: perhaps fix this broken sentence while we are at it.

But yeah, also LGTM.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143988/new/

https://reviews.llvm.org/D143988